公开(公告)号：US06552580B2

公开(公告)日：2003-04-22

申请号：US09559498

申请日：2000-04-27

申请人： Christopher D. Nilson ,  Thomas B. Cho

发明人： Christopher D. Nilson ,  Thomas B. Cho

IPC分类号： H03K522

CPC分类号： G05F3/242

摘要： A multistage analog circuit for independently controlling a bias current in each stage of the multistage analog circuit having an input stage, an intermediate stage, and an output stage, includes a first current source which controls the input stage of the circuit, a second current source which controls the intermediate stage of the circuit, and a third current source which controls the output stage of the circuit. The bias current in each stage of the circuit is set by the first, second, and third current sources. An output voltage of the circuit is capable of remaining the same when the first current source is changed to affect an input transconductance of the circuit.

公开(公告)号：US07081775B2

公开(公告)日：2006-07-25

申请号：US10379132

申请日：2003-03-03

申请人： Christopher D. Nilson ,  Thomas B. Cho

发明人： Christopher D. Nilson ,  Thomas B. Cho

IPC分类号： H03R5/22

CPC分类号： G05F3/242

摘要： A multistage analog circuit for independently controlling a bias current in each stage of the multistage analog circuit having an input stage, an intermediate stage, and an output stage, includes a first current source which controls the input stage of the circuit, a second current source which controls the intermediate stage of the circuit, and a third current source which controls the output stage of the circuit. The bias current in each stage of the circuit is set by the first, second, and third current sources. An output voltage of the circuit is capable of remaining the same when the first current source is changed to affect an input transconductance of the circuit.

公开(公告)号：US08582332B2

公开(公告)日：2013-11-12

申请号：US13026938

申请日：2011-02-14

申请人： Ashutosh Verma ,  Shafiq M. Jamal ,  Thomas B. Cho ,  Sehat Sutardja

发明人： Ashutosh Verma ,  Shafiq M. Jamal ,  Thomas B. Cho ,  Sehat Sutardja

IPC分类号： H02M3/07

CPC分类号： H02M3/07 ,  H02M2001/009

摘要： An apparatus includes a first switch coupled to a first voltage reference and a second switch coupled to a second voltage reference. A third switch is coupled to a first terminal of a first capacitor and a first terminal of a second capacitor. A fourth switch is coupled to a second terminal of the first capacitor and the first terminal of the second capacitor. A fifth switch is coupled to the second terminal of the first capacitor and a first terminal of a third capacitor. A sixth switch is coupled to the first terminal of the first capacitor and the first terminal of the third capacitor. The first switch, the second switch, the third switch, the fourth switch, the fifth switch, and the sixth switch are controlled to maintain a first voltage level at a first output and a second voltage level at a second output.

摘要翻译： 一种装置包括耦合到第一电压基准的第一开关和耦合到第二电压基准的第二开关。 第三开关耦合到第一电容器的第一端子和第二电容器的第一端子。 第四开关耦合到第一电容器的第二端子和第二电容器的第一端子。 第五开关耦合到第一电容器的第二端子和第三电容器的第一端子。 第六开关耦合到第一电容器的第一端子和第三电容器的第一端子。 控制第一开关，第二开关，第三开关，第四开关，第五开关和第六开关，以将第一电压电平维持在第一输出，第二电压电平维持在第二输出。

公开(公告)号：US20110116399A1

公开(公告)日：2011-05-19

申请号：US12944031

申请日：2010-11-11

申请人： Thomas B. Cho ,  Li Lin ,  Mao Yu ,  Atul Salhotra

发明人： Thomas B. Cho ,  Li Lin ,  Mao Yu ,  Atul Salhotra

IPC分类号： H04L12/26 ,  H04W24/00

CPC分类号： H04L27/0002 ,  H03F1/0272 ,  H03G3/3068

摘要： Apparatus having corresponding methods and non-transitory computer-readable media comprise an amplifier configured to amplify signals according to a bias current, wherein the signals represent packets of data; a packet module configured to recover the packets of data from the signals amplified by the amplifier; and a control module configured to control the bias current according to one or more characteristics of the packets of data.

摘要翻译： 具有相应方法和非瞬时计算机可读介质的装置包括放大器，其经配置以根据偏置电流放大信号，其中所述信号表示数据分组; 分组模块，被配置为从放大器放大的信号中恢复数据分组; 以及控制模块，被配置为根据所述数据分组的一个或多个特性来控制所述偏置电流。

公开(公告)号：US07589660B1

公开(公告)日：2009-09-15

申请号：US12217766

申请日：2008-07-08

申请人： Thomas B. Cho

发明人： Thomas B. Cho

IPC分类号： H03M1/12

CPC分类号： H03M1/002 ,  H03M1/123 ,  H03M1/164

摘要： A pipelined analog to digital converter comprises N stages, wherein N is an integer greater than one. A sample and integrate circuit communicates with at least two stages of the N stages. The sample and integrate circuit selectively samples a first voltage input to one of the at least two stages while integrating a difference between a sampled second voltage input of another one of the at least two stages and a second reference voltage to generate a second residue. The sample and integrate circuit selectively integrates a difference between the sampled first voltage and a first reference voltage to generate a first residue while sampling a second voltage input.

摘要翻译： 流水线模数转换器包括N级，其中N是大于1的整数。 采样和集成电路与N级的至少两级进行通信。 采样和积分电路选择性地将第一电压输入采样到至少两个级中的一个级，同时积分至少两级中的另一级的采样的第二电压输入与第二参考电压之间的差以产生第二残差。 采样和积分电路选择性地将采样的第一电压和第一参考电压之间的差异积分，以在对第二电压输入进行采样时产生第一残余。

公开(公告)号：US06735418B1

公开(公告)日：2004-05-11

申请号：US09527314

申请日：2000-03-16

申请人： Donald E. MacNally ,  Thomas B. Cho

发明人： Donald E. MacNally ,  Thomas B. Cho

IPC分类号： H04B144

CPC分类号： H04B1/0458 ,  H04B1/18

摘要： An antenna interface for a Time Division Duplex (TDD) radio transceiver allows a transceiver to be attached to an antenna/filter without the need for an antenna switch. The antenna interface includes a single Balun circuit to convert a single-ended signal to/from differential signals, and a single impedance matching circuit to match an impedance at an output of the single Balun circuit with an input impedance of a Low Noise Amplifier (LNA) of a receiver and to provide an output impedance of a Power Amplifier (PA) of a transmitter. The single impedance matching circuit is coupled to both the LNA and the PA. The LNA and the PA are based on CMOS technology and made within a single integrated circuit.

摘要翻译： 用于时分双工（TDD）无线电收发器的天线接口允许收发器连接到天线/滤波器，而不需要天线切换。 天线接口包括单个平衡电路，用于将单端信号转换为差分信号，并将单个阻抗匹配电路与单个巴伦电路输出端的阻抗与低噪声放大器（LNA）的输入阻抗相匹配 ）并且提供发射机的功率放大器（PA）的输出阻抗。 单阻抗匹配电路耦合到LNA和PA两者。 LNA和PA基于CMOS技术，并在单个集成电路中进行。

公开(公告)号：US08570887B2

公开(公告)日：2013-10-29

申请号：US12944031

申请日：2010-11-11

申请人： Thomas B. Cho ,  Li Lin ,  Mao Yu ,  Atul Salhotra

发明人： Thomas B. Cho ,  Li Lin ,  Mao Yu ,  Atul Salhotra

IPC分类号： G01R31/08

CPC分类号： H04L27/0002 ,  H03F1/0272 ,  H03G3/3068

摘要： Apparatus having corresponding methods and non-transitory computer-readable media comprise an amplifier configured to amplify signals according to a bias current, wherein the signals represent packets of data; a packet module configured to recover the packets of data from the signals amplified by the amplifier; and a control module configured to control the bias current according to one or more characteristics of the packets of data.

摘要翻译： 具有相应方法和非瞬时计算机可读介质的装置包括放大器，其经配置以根据偏置电流放大信号，其中所述信号表示数据分组; 分组模块，被配置为从放大器放大的信号中恢复数据分组; 以及控制模块，被配置为根据所述数据分组的一个或多个特性来控制所述偏置电流。

公开(公告)号：US08536874B1

公开(公告)日：2013-09-17

申请号：US11407417

申请日：2006-04-20

申请人： Thomas B. Cho ,  Wai-Tat Wong

发明人： Thomas B. Cho ,  Wai-Tat Wong

IPC分类号： G01R31/08

CPC分类号： G01R19/16552

摘要： A voltage sensing module for an integrated circuit (IC) that supports operation at a plurality of different voltage levels includes a voltage generation module that generates first and second voltages based on an operating voltage level of the IC. A comparing module receives the first and second voltages and generates a voltage determination signal based on the first and second signals. The voltage determination signal selectively configures an input/output I/O pad of the IC.

摘要翻译： 用于支持在多个不同电压电平下操作的集成电路（IC）的电压感测模块包括基于IC的工作电压电平产生第一和第二电压的电压产生模块。 比较模块接收第一和第二电压，并且基于第一和第二信号产生电压确定信号。 电压确定信号选择性地配置IC的输入/输出I / O焊盘。

公开(公告)号：US07397412B1

公开(公告)日：2008-07-08

申请号：US11486906

申请日：2006-07-14

申请人： Thomas B. Cho

发明人： Thomas B. Cho

IPC分类号： H03M1/38

CPC分类号： H03M1/002 ,  H03M1/123 ,  H03M1/164

摘要： A pipelined analog to digital converter comprises N stages, wherein N is an integer greater than one. A sample and integrate circuit communicates with at least two stages of the N stages. The sample and integrate circuit selectively samples a first voltage input to one of the at least two stages while integrating a difference between a sampled second voltage input of another one of the at least two stages and a second reference voltage to generate a second residue. The sample and integrate circuit selectively integrates a difference between the sampled first voltage and a first reference voltage to generate a first residue while sampling a second voltage input.

摘要翻译： 流水线模数转换器包括N级，其中N是大于1的整数。 采样和集成电路与N级的至少两级进行通信。 采样和积分电路选择性地将第一电压输入采样到至少两个级中的一个级，同时积分至少两级中的另一级的采样的第二电压输入与第二参考电压之间的差以产生第二残差。 采样和积分电路选择性地将采样的第一电压和第一参考电压之间的差异积分，以在对第二电压输入进行采样时产生第一残余。

公开(公告)号：US4891308A

公开(公告)日：1990-01-02

申请号：US344974

申请日：1989-04-14

申请人： Thomas B. Cho

发明人： Thomas B. Cho

IPC分类号： G03C1/89

CPC分类号： G03C1/7614 ,  G03C1/89 ,  G03C2001/7628

摘要： As part of a photographic film, a backing antistatic layer is coated at a pH of 3 to 12 with an auxiliary layer consisting essentially of at least one crosslinkable conductive polymer and a crosslinking agent for the conductive polymer dispersed in a binder, e.g., gelatin, to conduct the antistatic properties from the antistatic underlayer to the surface of the backing layer. The crosslinkable conductive polymer and crosslinking agent can be present in separate layers on the backing layer. The film is useful in the areas of graphic arts, printing, medical and information systems.

摘要翻译： 作为照相胶片的一部分，背衬抗静电层的涂层厚度为3至12，其辅助层主要由至少一种可交联的导电聚合物和分散在粘合剂中的导电聚合物的交联剂组成，例如明胶， 以将抗静电性能从抗静电底层传导到背衬层的表面。 可交联的导电聚合物和交联剂可以存在于背衬层上的分开的层中。 这部电影在图形艺术，印刷，医疗和信息系统领域很有用。