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1.发明授权
公开(公告)号：US5255292A
公开(公告)日：1993-10-19
申请号：US858821
申请日：1992-03-27
IPC分类号： H04Q7/38 , H04J3/00 , H04L7/02 , H04L7/033 , H04L7/04 , H04L7/08 , H04L7/10 , H04L27/22 , H04L7/00 , H04L25/36 , H04L25/40
CPC分类号： H04L7/0062 , H04L7/042 , H04L7/10 , H04L7/0337
摘要： The present disclosure includes a discussion of a decision-directed clock recovery system which includes circuitry to prevent false-locking and accelerate acquisition on a known symbol patterns. The clock recovery system has at least two control circuits. Each control circuit has an effective bandwidth and also generates a clock signal. The clock recovery system samples the received data signal using the two clock signals, forming a corresponding first and second sampled signal. The sampled signals are used to generate corresponding symbol decisions. The symbol decision signals are processed to detect a known symbol pattern in the received data signal. Upon detection of the known bit sequence, the characteristics of the clock recovery system are modified, namely, the effective bandwidth of the control circuits are modified.
摘要翻译： 本公开包括对决策型时钟恢复系统的讨论，其包括防止假锁定并加速对已知符号模式的采集的电路。 时钟恢复系统至少有两个控制电路。 每个控制电路具有有效带宽并且还产生时钟信号。 时钟恢复系统使用两个时钟信号对接收的数据信号进行采样，形成对应的第一和第二采样信号。 采样信号用于产生相应的符号决定。 处理符号判定信号以检测接收的数据信号中的已知符号模式。 在检测到已知比特序列时，修改了时钟恢复系统的特性，即改变了控制电路的有效带宽。
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公开(公告)号：US5289505A
公开(公告)日：1994-02-22
申请号：US806511
申请日：1991-12-13
IPC分类号： H04L27/233 , A61F13/15 , H03D7/00 , H03D13/00 , H04L27/22
CPC分类号： H03D7/00 , H03D13/001 , H03D2200/005 , H03D2200/006 , H03D2200/007
摘要： The present patent application discusses a frequency translation apparatus for altering the effective frequency of the phase information of an input signal (115). The input signal (115) has a first phase (.theta.(t)) and a first frequency (f.sub.i). The phase of the input signal is extracted and digitized at a second frequency (f.sub.o), forming a second N-bit digital phase signal (.theta.'(t))(311). The frequency translation apparatus generates a third digital phase signal (319) which approximates the difference between .theta.(t) and .theta.'(t). Then, the frequency translation apparatus combines the second digital phase signal and the third digital phase signal, forming a fourth digital phase signal (307) substantially approximating the first phase signal.
摘要翻译： 本专利申请讨论了用于改变输入信号（115）的相位信息的有效频率的频率转换装置。 输入信号（115）具有第一相位（（θ）（t））和第一频率（fi）。 输入信号的相位被提取并以第二频率（fo）数字化，形成第二N位数字相位信号（（θ）'（t））（311）。 频率转换装置产生近似（θ）（t）和（θ）'（t）之间的差的第三数字相位信号（319）。 然后，频率转换装置组合第二数字相位信号和第三数字相位信号，形成基本上接近第一相位信号的第四数字相位信号（307）。
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公开(公告)号：US07907671B2
公开(公告)日：2011-03-15
申请号：US11003247
申请日：2004-12-03
申请人： Armin W. Klomsdorf , Michael J. Carney , Joseph F. Cramer, III , Christopher P. LaRosa , Dale G. Schwent , Robert S. Trocke
发明人： Armin W. Klomsdorf , Michael J. Carney , Joseph F. Cramer, III , Christopher P. LaRosa , Dale G. Schwent , Robert S. Trocke
IPC分类号： H04K1/10
CPC分类号： H04L25/03834 , H04W52/16
摘要： A communication unit is provided having a transmitter and a processor (103). The processor (103) receives information (105) representative of a configuration of physical channels (107). The processor (103) determines a scaling factor responsive to the information (105) and facilitates scaling a signal (109, 111) provided by a combination of the channels utilizing the scaling factor. The scaled signal (109, 111) is provided to the transmitter.
摘要翻译： 提供具有发射机和处理器（103）的通信单元。 处理器（103）接收表示物理信道（107）的配置的信息（105）。 处理器（103）响应于信息（105）确定缩放因子，并且便于利用缩放因子缩放由信道的组合提供的信号（109,111）。 缩放信号（109,111）被提供给发射机。
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公开(公告)号：US5299232A
公开(公告)日：1994-03-29
申请号：US858245
申请日：1992-03-26
CPC分类号： H03D1/04
摘要： A method of and apparatus for compensating a received signal's phase compensates for the distortion caused by the asymmetrical characteristics of a voltage limiter. This compensation allows the received signal to be sampled at the positive and negative zero-crossings reducing the requirements of a local oscillator in a radiotelephone system. First, the phase of the received signal is sampled at the positive and negative zero-crossings, forming a corresponding positive-crossing and a negative-crossing phase value for the received signal. Second, the negative-crossing and positive-crossing phase values are combined, forming a first difference signal. Third, an estimated error signal is formed using the first difference signal. Fourth, the estimated error signal is combined with the positive or negative zero-crossing phase signals, substantially eliminating the asymmetrical distortion.
摘要翻译： 用于补偿接收信号相位的方法和装置补偿由电压限制器的不对称特性引起的失真。 该补偿允许接收信号在正和负过零点进行采样，从而减少无线电话系统中本地振荡器的要求。 首先，在正和负过零点对接收信号的相位进行采样，形成接收信号的相应的正交和负相位值。 其次，将负交叉相位值和正交相位值组合起来，形成第一差分信号。 第三，使用第一差分信号形成估计误差信号。 第四，估计误差信号与正或负过零相位信号组合，基本上消除了非对称失真。
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公开(公告)号：US5461643A
公开(公告)日：1995-10-24
申请号：US44530
申请日：1993-04-08
IPC分类号： H03L7/085 , G01R29/02 , H04B14/02 , H04L27/233 , H03D3/22
CPC分类号： H04L27/2337
摘要： A radio receiver directly digitizes the phase of an intermediate frequency (IF) signal with a desired resolution. The frequency of the reference oscillator in the direct phase digitizer is reduced when compared to the frequency previously required for the same resolution. The reduction in the reference oscillator frequency is accomplished by differentiating between IF zero-crossings that occur during the first half of a reference oscillator cycle and zero-crossings which occur during the second half of the reference oscillator cycle. The apparatus utilizes 2 zero-crossing detectors, the first zero-crossing detector is driven by a positive edge of the reference oscillator signal and the second zero-crossing detector is driven by a negative edge of the reference oscillator signal. Depending upon the alignment of the negative edge zero-crossing indicator and the positive edge zero-crossing indicator, the N-bit phase signal is modified or shifted by one-half a phase sector.
摘要翻译： 无线电接收机直接以期望的分辨率数字化中频（IF）信号的相位。 与先前相同分辨率所需的频率相比，直接相位数字化仪中的参考振荡器的频率降低。 参考振荡器频率的降低通过区分在参考振荡器周期的前半部分发生的IF过零点和在参考振荡器周期的后半段期间发生的过零点来实现。 该装置使用2个过零检测器，第一个过零检测器由参考振荡器信号的上升沿驱动，第二个过零检测器由参考振荡器信号的下降沿驱动。 取决于负沿过零指示器和正边沿过零指示器的对准，N位相位信号被修改或偏移了半个相位扇区。
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公开(公告)号：US5367538A
公开(公告)日：1994-11-22
申请号：US124995
申请日：1993-09-21
IPC分类号： H03D3/00 , H04L7/033 , H04L27/233 , H03D3/18
CPC分类号： H04L27/2337 , H04L7/0331
摘要： This patent application discusses a direct phase digitizing apparatus (303) for use in a radiotelephone (101). The direct phase digitizing apparatus (303) accepts a first analog signal (309) having a phase, a voltage range and a first frequency. First, the direct phase digitizer generates an estimated phase map (611) having a second frequency and N-bits of resolution. Second, the direct phase digitizer detects a predetermined-voltage crossing (409) of the first analog signal (309). Third, using the predetermined-voltage crossings, the direct phase digitizer samples the estimated phase map. Fourth, a digital phase signal (623) is generated using the samples of the estimated phase map.
摘要翻译： 该专利申请讨论了用于无线电话机（101）中的直接相位数字化装置（303）。 直接相位数字化装置（303）接受具有相位，电压范围和第一频率的第一模拟信号（309）。 首先，直接相位数字转换器生成具有第二频率和分辨率N位的估计相位图（611）。 第二，直接相位数字化仪检测第一模拟信号（309）的预定电压交叉（409）。 第三，使用预定电压交叉，直接相位数字化仪对估计的相位图进行采样。 第四，使用估计的相位图的样本产生数字相位信号（623）。
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公开(公告)号：US5323421A
公开(公告)日：1994-06-21
申请号：US954172
申请日：1992-09-30
CPC分类号： H04L1/208 , H04B1/1027 , H04B17/20
摘要： The present disclosure includes a discussion of a method of and apparatus for channel quality estimation (CQE) in a receiver. Each channel is divided into observation intervals and sub-intervals. The duration of the sub-interval is chosen as the largest interval in which the channel is essentially static. The CQE collects error information for each symbol of the sub-interval, forming a sub-interval error value. The CQE maps the sub-interval error value into a sub-interval bit error rate (BER) estimate. The mapping is a non-linear function dependent on the specific radio system. Then, the CQE averages the sub-interval BER estimates over the entire observation interval, forming an interval BER estimate. Finally, the CQE compares the interval BER estimate to a predetermined threshold, forming a channel quality estimation decision for each observation interval.
摘要翻译： 本公开包括对接收机中的信道质量估计（CQE）的方法和装置的讨论。 每个通道分为观察间隔和子间隔。 选择子间隔的持续时间作为信道本质上是静态的最大间隔。 CQE收集子间隔的每个符号的错误信息，形成子间隔误差值。 CQE将子间隔误差值映射为子间隔误码率（BER）估计。 映射是取决于特定无线电系统的非线性函数。 然后，CQE对整个观测间隔的子区间BER估计进行平均，形成间隔BER估计。 最后，CQE将间隔BER估计与预定阈值进行比较，形成每个观测间隔的信道质量估计决定。
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公开(公告)号：US5280637A
公开(公告)日：1994-01-18
申请号：US761527
申请日：1991-09-18
CPC分类号： H04B7/0874 , H04B7/0871 , H04B7/0802 , H04B7/0857
摘要： A phase combining method and apparatus for use in a diversity reception radiotelephone is described. The phase combining method and apparatus is a hybrid diversity technique which combines elements of maximal ratio combining (MRC) and level comparison selection diversity, which results in a simple and effective implementation of a diversity receiver with superior performance. The diversity receiver demodulates the received signals, extracts the phase, forming two phase signals. Then, the two phase signals are combined to form a third phase signal. One of the three phase signals is selected to be used for interpretation of a symbol in the Quadrature Phase Shift Keying (QPSK) constellation. The selection process is based on the received signal strength of the received signals.
摘要翻译： 描述了用于分集接收无线电话机的相位组合方法和装置。 相位组合方法和装置是组合最大比组合（MRC）和电平比较选择分集的元件的混合分集技术，其导致具有优异性能的分集接收机的简单有效的实现。 分集接收机对接收到的信号进行解调，提取相位，形成两相信号。 然后，将两相信号组合形成第三相位信号。 选择三相信号中的一个用于解码正交相移键控（QPSK）星座中的符号。 选择处理基于接收信号的接收信号强度。
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公开(公告)号：US5259005A
公开(公告)日：1993-11-02
申请号：US858246
申请日：1992-03-26
CPC分类号： H04L7/0337
摘要： The method of synchronizing a sampling clock signal to a received data signal, the clock recovery circuit generates several clock signals at the symbol rate, with each clock signal having a unique phase. To permit fast initial acquisition, the set of clock signals includes a pair of clocks which differ in phase by one-half of a symbol interval. Additionally, the clock recovery circuitry generates error signals representing the difference between the phase of the received data signal and the phase of each clock signal. The error signals are processed over multiple symbol times to determine the optimal sampling phase. The clock recovery circuit then adjusts or maintains the phase of the symbol clock to provide the optimal sampling phase.
摘要翻译： 时钟恢复电路将采样时钟信号同步到接收数据信号的方法，以符号速率产生几个时钟信号，每个时钟信号具有唯一的相位。 为了允许快速初始采集，该组时钟信号包括一对时钟，其相位差符号间隔的一半。 此外，时钟恢复电路产生表示接收数据信号的相位与每个时钟信号的相位之差的误差信号。 在多个符号时间处理错误信号以确定最佳采样阶段。 时钟恢复电路然后调整或维持符号时钟的相位以提供最佳采样阶段。
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10.发明授权
公开(公告)号：US5247544A
公开(公告)日：1993-09-21
申请号：US858272
申请日：1992-03-26
CPC分类号： H04L7/0062 , H04L7/0083
摘要： A clock recovery circuit employs a method of and apparatus for adjusting the phase of a recovered clock signal. The clock signal is recovered from a received input signal. The clock recovery circuit generates a sampling clock signal which is synchronous with the received signal. Additionally, the phase adjustment apparatus generates at least two error signals which indicate the quality of the received signal at different sampling phases. The smallest error signal is referred to as the minimum error value. Each error signal is compared to the minimum error value, creating a corresponding normalized error magnitude signal. Each normalized error magnitude signal is processed to determine the desired phase of the sampling clock signal. Dependent upon the processing of the normalized error magnitude signals, the phase of the sampling clock signal is either shifted or maintained until the next sampling point. The phase of the sampling clock signal is maintained during periods indicating poor received input signal quality.
摘要翻译： 时钟恢复电路采用调整恢复的时钟信号的相位的方法和装置。 从接收到的输入信号恢复时钟信号。 时钟恢复电路产生与接收信号同步的采样时钟信号。 此外，相位调整装置产生至少两个误差信号，其指示在不同采样阶段的接收信号的质量。 最小误差信号被称为最小误差值。 将每个误差信号与最小误差值进行比较，产生对应的归一化误差幅度信号。 处理每个归一化误差幅度信号以确定采样时钟信号的期望相位。 取决于归一化误差幅度信号的处理，采样时钟信号的相位被移位或维持直到下一个采样点。 采样时钟信号的相位在表示接收输入信号质量差的时段期间保持。
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