Abstract:
Devices that include a logic circuit and first and second buffers are provided. The first buffer is spaced apart from the logic circuit by a first distance (and/or is refreshed in a first cycle), and the second buffer is spaced apart from the logic circuit by a second distance that is shorter than the first distance (and/or is refreshed in a second cycle that is different from the first cycle). Moreover, the logic circuit is configured to output, to the first buffer, first data corresponding to fewer toggles than second data that is output from the logic circuit to the second buffer. Methods of operating the devices are also provided.
Abstract:
A display device includes: a plurality of pixels; a data driver connected to the plurality of pixels by a plurality of data lines and applying data signals to the plurality of pixels; a scan driver connected to the plurality of pixels by a plurality of scan lines and applying scan signals to the plurality of pixels for the data signals to be applied to the plurality of pixels; a boost driver connected to the plurality of pixels by a plurality of boost lines and applying boost signals, boosting the pixel voltage charged to the plurality of pixels by the data signals, to the plurality of pixels; and a boost voltage maintaining unit applying a restoring voltage restoring the voltage in the plurality of boost lines by the scan signal to the plurality of boost lines. The voltage generated in the boost line by the coupling may be quickly restored and the crosstalk may be minimized, thereby improving the image quality.
Abstract:
An active level shift (ALS) driver circuit, a liquid crystal display device including the ALS driver circuit, and a method of driving the liquid crystal display device. A liquid crystal display device having a slim external black matrix may be provided by fabricating the ALS driver circuit using inverters and a transmission gate.
Abstract:
The embodiment is to provide a liquid crystal display device capable of detecting malfunctions. The liquid crystal display device includes pixels configured to be connected to scan lines and data lines, data pads electrically connected to the data lines, a data integrated circuit supplying data signals to the data lines through the data pads, first data transistors coupled to the data pads, and second data transistors coupled to the data lines. The first data transistors are disposed on the data integrated circuit and the second data transistors are separated from the data integrated circuit.
Abstract:
An array substrate includes a display area including a plurality of pixels coupled to a plurality of gate lines and a plurality of data lines; a data driving unit, coupled to a fan-out unit and configured to drive the data lines; a first switching circuit between the display area and the data driving unit and configured to control the data lines to share electric charges in an image display mode; and a second switching circuit coupled to the fan-out unit via a fuse unit and configured to be disconnected from the fan-out unit in the image display mode.
Abstract:
A shift register including a plurality of stages, each of them including a first node, a second node, and a third node being in a high-impedance state when the first node is in a high-impedance state. The shift register includes an input circuit unit inputting a driving voltage to the first node in response to an output signal of a previous stage, a driving circuit unit generating an output signal according to a voltage of the first node, and a holding unit holding the output signal at a level of a gate-off voltage according to a voltage of the second node in an inactive period of a current stage, in which the holding unit comprises a first diode which applies a clock signal to the second node.
Abstract:
An active level shift (ALS) driver circuit and a liquid crystal display apparatus including the ALS driver circuit are disclosed. The ALS driver circuit includes an input unit configured to apply a first polarity voltage to a first node and to apply a second polarity voltage to a second node, a level compensation unit configured to adjust the voltages of the first node and the second node, and an output unit configured to alternately output a first power voltage and a second power voltage according to the adjusted voltages of the first and second nodes.
Abstract:
A liquid crystal display (LCD) includes a pixel unit having pixels, each of the pixels positioned at a corresponding intersection of gate lines and data lines. A drive circuit unit is positioned at one side of the pixel unit to supply driving signals to the gate lines and the data lines. Test pads are connected to the data lines. In the LCD, each of the data lines is electrically connected between the pixel unit and the drive circuit unit via one or more lines among a first line formed in a first layer and a second line formed in a second layer, and wherein each of the data lines is connected to a different test pad from the test pad connected to adjacent data lines in each of the first and second layers.
Abstract:
A display panel includes gate lines formed on a substrate, storage electrode lines formed on the substrate and being parallel to the gate lines, data lines insulated from the gate lines and crossing the gate lines, a plurality of thin film transistors (TFTs) connected with the gate lines and the data lines, and pixel electrodes having a first sub-electrode connected with a TFT and a second sub-electrode formed at a side opposite the first sub-electrode with respect to a gate line, wherein the TFT and a storage electrode line are disposed between the first and second sub-electrodes.
Abstract:
An analog buffer, display device having the same and a method of driving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.