公开(公告)号：US09628002B2

公开(公告)日：2017-04-18

申请号：US14208277

申请日：2014-03-13

Applicant: Cirrus Logic, Inc.

Inventor： Branislav Pjetar ,  Marc J. Kobayashi

IPC: H02P27/00 ,  H02P6/12 ,  G01R31/34 ,  H02P6/182 ,  G01R31/42

CPC classification number: H02P6/12 ,  G01R31/343 ,  G01R31/42 ,  H02P6/182

Abstract: The system contains a controller unit comprising a memory device, a processing unit, and at least one analog-to-digital converter. A power stage has a plurality of switches, wherein the power stage receives a control signal from the control circuit and a power signal from a power source. The power stage drives two windings of the set of three stator windings to rotate a rotor and maintains one stator winding of the three stator windings undriven. The memory device stores a plurality of values for the driven current and a plurality of demodulated undriven winding voltages. The processing unit compares the plurality of values and periodically calculates a rotor sextant while the rotor rotates. The processing unit compares at least two demodulated undriven winding voltage values corresponding to at least two current values within the rotor sextant to calculate the rotor sextant parity and verify the calculation of the rotor sextant.

公开(公告)号：US20140312816A1

公开(公告)日：2014-10-23

申请号：US14208277

申请日：2014-03-13

Applicant: Cirrus Logic, Inc.

Inventor： Branislav Pjetar ,  Marc J. Kobayashi

IPC: H02P6/12 ,  G01R31/34

CPC classification number: H02P6/12 ,  G01R31/343 ,  G01R31/42 ,  H02P6/182

Abstract: The system contains a controller unit comprising a memory device, a processing unit, and at least one analog-to-digital converter. A power stage has a plurality of switches, wherein the power stage receives a control signal from the control circuit and a power signal from a power source. The power stage drives two windings of the set of three stator windings to rotate a rotor and maintains one stator winding of the three stator windings undriven. The memory device stores a plurality of values for the driven current and a plurality of demodulated undriven winding voltages. The processing unit compares the plurality of values and periodically calculates a rotor sextant while the rotor rotates. The processing unit compares at least two demodulated undriven winding voltage values corresponding to at least two current values within the rotor sextant to calculate the rotor sextant parity and verify the calculation of the rotor sextant.

Abstract translation: 该系统包括控制器单元，其包括存储器件，处理单元和至少一个模拟 - 数字转换器。 功率级具有多个开关，其中功率级从控制电路接收控制信号和来自电源的功率信号。 功率级驱动三组定子绕组组合的两个绕组，以使转子旋转并维持三个定子绕组中的一个定子绕组未驱动。 存储器件存储驱动电流的多个值和多个解调的未驱动绕组电压。 处理单元比较多个值，并且当转子旋转时周期性地计算转子六分仪。 处理单元比较对应于转子六分仪内的至少两个电流值的至少两个解调的未驱动绕组电压值，以计算转子六分仪奇偶校验并验证转子六分仪的计算。