DELTA-SIGMA MODULATORS WITH IMPROVED NOISE PERFORMANCE
    1.
    发明申请
    DELTA-SIGMA MODULATORS WITH IMPROVED NOISE PERFORMANCE 有权
    具有改进噪声性能的DELTA-SIGMA调制器

    公开(公告)号:US20030227401A1

    公开(公告)日:2003-12-11

    申请号:US10162324

    申请日:2002-06-04

    CPC classification number: H03M3/368 H03M3/424 H03M3/452

    Abstract: An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.

    Abstract translation: 用于Δ-Σ调制器的积分器级包括运算放大器,耦合运算放大器的输出的积分电容器和运算放大器输入端的求和节点和反馈路径。 反馈路径包括第一和第二电容器,该第一和第二电容器具有在公共板节点处共同电耦合的第一板和用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路。 积分器级还包括用于在积分阶段期间选​​择性地耦合公共板节点和求和节点的开关。

    Delta-sigma modulators with improved noise performance
    2.
    发明申请
    Delta-sigma modulators with improved noise performance 有权
    具有改进噪声性能的Delta-Σ调制器

    公开(公告)号:US20040108947A1

    公开(公告)日:2004-06-10

    申请号:US10643127

    申请日:2003-08-18

    CPC classification number: H03M3/368 H03M3/424 H03M3/452

    Abstract: An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.

    Abstract translation: 用于Δ-Σ调制器的积分器级包括运算放大器,耦合运算放大器的输出的积分电容器和运算放大器输入端的求和节点和反馈路径。 反馈路径包括第一和第二电容器,该第一和第二电容器具有在公共板节点处共同电耦合的第一板和用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路。 积分器级还包括用于在积分阶段期间选​​择性地耦合公共板节点和求和节点的开关。

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