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公开(公告)号：US09990173B2
公开(公告)日：2018-06-05
申请号：US15099277
申请日：2016-04-14
Inventor： Dylan Alexander Hester , Bala Vishnu Shankar Rao , Tarun Soni , John L. Melanson
CPC classification number: G06F3/165 , G11B27/038 , H04H60/04
Abstract: An audio processor may process dissimilarly formatted digital audio signals and produce an analog output for reproduction by a transducer, such as a speaker. The audio processor may be, for example, a digital-to-analog converter (DAC) with multiple digital inputs and a single analog output. The audio processor may also include other components, such as processing components, filters, equalizers, amplifiers, and the like. The audio processor may process audio, such as high fidelity DSD audio and lower fidelity PCM audio, and combine the differently formatted data into a single output. During processing, the audio processor may manipulate the different audio signals, such as by ducking a music playback to allow a notification sound to be played.
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公开(公告)号：US20170372717A1
公开(公告)日：2017-12-28
申请号：US15192258
申请日：2016-06-24
Inventor： Cory Jay Peterson , Dylan Alexander Hester
CPC classification number: G06F3/165
Abstract: A digital volume control may be implemented in a digital-to-analog controller (DAC) when an output rate of the DAC is higher than the input rate. The upsampling conversion process from the digital input to analog output may be controlled to adjust a volume of an output signal produced from the digital signals. The frames produced by the upsampling conversion process may include a fraction of scheduling blocks filled with the input data bit, where the fraction is based on a desired volume. The generated frames are provided to a finite impulse response (FIR) filter that produces an analog signal with a magnitude proportional to the determined fraction of scheduling blocks.
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3.发明授权公开(公告)号：US09936282B2
公开(公告)日：2018-04-03
申请号：US15099293
申请日：2016-04-14
Inventor： Dylan Alexander Hester , Bala Vishnu Shankar Rao
CPC classification number: H04R1/22 , H03H17/0657 , H04R2430/03
Abstract: The behavior of a NOS DAC and an analog filter may be emulated by electronic components of an integrated circuit (IC) by upsampling data and applying a digital filter to the upsampled data. For example, the IC may include a zero-order-hold circuit that upsamples data from a first input sample rate to a second, higher input rate. The upsampled data may be passed to an Asynchronous Sample Rate Converter (ASRC) that performs further upsampling (e.g., from 8*Fs-64*Fs). The upsampled data may be passed to a digital low pass filter. The digital low pass filter may emulate, for example, a response of a fifth order Butterworth analog filter to mimic the effect of analog processing. The IC may integrate the upsampling circuit, the low pass digital filter, a digital-to-analog converter (DAC) and an amplifier to provide an audio solution for playing high-fidelity music in a mobile device.
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Patent Agency Ranking
公开(公告)号：US09875750B2
公开(公告)日：2018-01-23
申请号：US15192258
申请日：2016-06-24
Inventor： Cory Jay Peterson , Dylan Alexander Hester
CPC classification number: G06F3/165
Abstract: A digital volume control may be implemented in a digital-to-analog controller (DAC) when an output rate of the DAC is higher than the input rate. The upsampling conversion process from the digital input to analog output may be controlled to adjust a volume of an output signal produced from the digital signals. The frames produced by the upsampling conversion process may include a fraction of scheduling blocks filled with the input data bit, where the fraction is based on a desired volume. The generated frames are provided to a finite impulse response (FIR) filter that produces an analog signal with a magnitude proportional to the determined fraction of scheduling blocks.
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5.发明申请公开(公告)号：US20170303032A1
公开(公告)日：2017-10-19
申请号：US15099293
申请日：2016-04-14
Inventor： Dylan Alexander Hester , Bala Vishnu Shankar Rao
IPC: H04R1/22
CPC classification number: H04R1/22 , H03H17/0657 , H04R2430/03
Abstract: The behavior of a NOS DAC and an analog filter may be emulated by electronic components of an integrated circuit (IC) by upsampling data and applying a digital filter to the upsampled data. For example, the IC may include a zero-order-hold circuit that upsamples data from a first input sample rate to a second, higher input rate. The upsampled data may be passed to an Asynchronous Sample Rate Converter (ASRC) that performs further upsampling (e.g., from 8*Fs-64*Fs). The upsampled data may be passed to a digital low pass filter. The digital low pass filter may emulate, for example, a response of a fifth order Butterworth analog filter to mimic the effect of analog processing. The IC may integrate the upsampling circuit, the low pass digital filter, a digital-to-analog converter (DAC) and an amplifier to provide an audio solution for playing high-fidelity music in a mobile device.
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公开(公告)号：US10200053B2
公开(公告)日：2019-02-05
申请号：US15099319
申请日：2016-04-14
Inventor： Dylan Alexander Hester
Abstract: Droop caused by a filter may be compensated by applying a pre-filter to the audio signal that cancels out, at least in part, the droop caused by the filter. The pre-filter may implement magnitude compensation that causes an approximately flat passband response when the pre-filtered signal is passed through the filter. The pre-filter may be applied to one-bit wide data streams, such as high-fidelity direct stream digital (DSD) audio data or other one-bit wide data such as pulse-density modulation (PDM) encoded data. The pre-filtering and filtering may be implemented in components of an audio processor, such as in a digital-to-analog converter (DAC). The pre-filtering may include upsampling the one-bit wide data to form symbols and substituting an eighth bit of the symbol with an inverted version of an earlier-received bit.
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公开(公告)号：US20170301360A1
公开(公告)日：2017-10-19
申请号：US15099319
申请日：2016-04-14
Inventor： Dylan Alexander Hester
CPC classification number: H03M1/0626 , H03H17/0219 , H03M1/66
Abstract: Droop caused by a filter may be compensated by applying a pre-filter to the audio signal that cancels out, at least in part, the droop caused by the filter. The pre-filter may implement magnitude compensation that causes an approximately flat passband response when the pre-filtered signal is passed through the filter. The pre-filter may be applied to one-bit wide data streams, such as high-fidelity direct stream digital (DSD) audio data or other one-bit wide data such as pulse-density modulation (PDM) encoded data. The pre-filtering and filtering may be implemented in components of an audio processor, such as in a digital-to-analog converter (DAC). The pre-filtering may include upsampling the one-bit wide data to form symbols and substituting an eighth bit of the symbol with an inverted version of an earlier-received bit.
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公开(公告)号：US20170300290A1
公开(公告)日：2017-10-19
申请号：US15099277
申请日：2016-04-14
Inventor： Dylan Alexander Hester , Bala Vishnu Shankar Rao , Tarun Soni , John L. Melanson
CPC classification number: G06F3/165 , G11B27/038 , H04H60/04
Abstract: An audio processor may process dissimilarly formatted digital audio signals and produce an analog output for reproduction by a transducer, such as a speaker. The audio processor may be, for example, a digital-to-analog converter (DAC) with multiple digital inputs and a single analog output. The audio processor may also include other components, such as processing components, filters, equalizers, amplifiers, and the like. The audio processor may process audio, such as high fidelity DSD audio and lower fidelity PCM audio, and combine the differently formatted data into a single output. During processing, the audio processor may manipulate the different audio signals, such as by ducking a music playback to allow a notification sound to be played.
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