公开(公告)号：US10455331B2

公开(公告)日：2019-10-22

申请号：US15916597

申请日：2018-03-09

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Hynek Saman ,  James Thomas Deas

IPC: H04R19/04 ,  H04R19/00 ,  H03F3/45 ,  H03F3/187 ,  H03F1/26 ,  H03F3/50

Abstract: An amplifier circuit has a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer and a signal node for receiving the input signal. An amplifier arrangement comprising a feedback resistor network provides an amplified output signal. A voltage buffer provides a buffered bias voltage at a buffer node which is connected to a terminal of the feedback resistor network, to at least partly define the quiescent level of the output signal. The buffer node is electrically coupled to the transducer biasing node via a capacitance which may form part of a bias filter.

公开(公告)号：US10582309B2

公开(公告)日：2020-03-03

申请号：US16549625

申请日：2019-08-23

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Hynek Saman ,  James Thomas Deas

IPC: H04R19/04 ,  H04R19/00 ,  H03F3/187 ,  H03F3/45

Abstract: This applications relates to methods and apparatus for amplifying signals from capacitive transducers, in particular MEMS transducers such as MEMS capacitive microphones. An amplifier circuit has a signal node for receiving the input signal, a transducer biasing node for outputting a transducer bias voltage for biasing the capacitive transducer, and a voltage buffer configured to generate a buffered bias voltage at a buffer node. An amplifier arrangement is configured to receive the input signal from the signal node and the buffered bias voltage. The amplifier circuit comprises a signal path for supplying the buffered bias voltage to the transducer biasing node via a first capacitance, and the amplifier arrangement comprises a feedback resistor network configured such that: a change in input signal with respect to the buffered bias voltage results in a change in the output signal with respect to the buffered bias voltage with a gain greater than one; and a change in the buffered bias voltage results in a change in the output signal with a gain equal to one.

公开(公告)号：US20180270588A1

公开(公告)日：2018-09-20

申请号：US15916597

申请日：2018-03-09

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Hynek Saman ,  James Thomas Deas

IPC: H04R19/04 ,  H04R19/00 ,  H03F3/187 ,  H03F3/45

CPC classification number: H04R19/04 ,  H03F1/26 ,  H03F3/187 ,  H03F3/45475 ,  H03F3/45636 ,  H03F3/505 ,  H03F2200/03 ,  H03F2200/213 ,  H04R19/005 ,  H04R2201/003

Abstract: This applications relates to methods and apparatus for amplifying signals from capacitive transducers, in particular MEMS transducers such as MEMS capacitive microphones. An amplifier circuit has a transducer biasing node (102) for outputting a transducer bias voltage for biasing the capacitive transducer (101) and a signal node (103) for receiving the input signal (Vin). An amplifier arrangement (108) comprising a feedback resistor network (304, 305) provides an amplified output signal (Vout). A voltage buffer (306) provides a buffered bias voltage at a buffer node (307) which is connected to a terminal of the feedback resistor network, to at least partly define the quiescent level of the output signal. The buffer node (307) is electrically coupled to the transducer biasing node (102) via a capacitance (106) which may form part of a bias filter.