公开(公告)号：US20200042288A1

公开(公告)日：2020-02-06

申请号：US16050990

申请日：2018-07-31

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： John Paul LESSO ,  Mark MCCLOY-STEVENS

IPC: G06F7/533 ,  H03K19/177

Abstract: This application relates to apparatus and methods for the multiplication of signals. A multiplication circuit (100) has first and second time-encoding modulators (103a, 103b) configured to receive first and second combined signals (SC1, SC2) respectively, and generate respective first and second PWM signals (SPWM1, SPWM2), each with a cycle frequency that depends substantially on the square of the value of the input combined signal. The first combined signal (SC1) corresponds to a sum of a first and second input signals (S1, S2) and the second combined signal (SC2) corresponds to the difference between the first and second input signals (S1, S2). First and second time-decoding converters (104a, 104b) receive the first and second PWM signals and provide respective first and count values (D1, D2) based on a parameter related to the frequency of the respective first or second PWM signal. A subtractor (105) determine a difference between the first and second count values (D1, D2) and provides an output signal (DOUT) based on this difference.

公开(公告)号：US20210242865A1

公开(公告)日：2021-08-05

申请号：US17159786

申请日：2021-01-27

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Andrew BUIST ,  Mark MCCLOY-STEVENS ,  Dave SMITH ,  Gordon RUSSELL ,  Huy Binh LE

IPC: H03K17/0814 ,  H02H3/18

Abstract: Circuitry for controlling current between a load and a power supply, the circuitry comprising: an output stage comprising: an input node configured to be coupled to the power supply; and an output node configured to be coupled to the load; and one or more control nodes for controlling a conduction path between the input node and the output node; and protection circuitry coupled to the one or more control nodes, the protection circuitry configured to break the conduction path between the input node and the output node when a load voltage at the output node exceeds a supply voltage at the input node, wherein the protection circuitry comprises: an active protection circuit configured to break the conduction path when the supply voltage exceeds an operational threshold of the active protection circuit; and a passive protection circuit configured to break the conduction path when the supply voltage is below an operation threshold of the active protection circuit.

公开(公告)号：US20210148968A1

公开(公告)日：2021-05-20

申请号：US17065799

申请日：2020-10-08

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： James WELLS ,  Saurabh SINGH ,  Huy Binh LE ,  Gavin WILSON ,  Niall MCGURNAGHAN ,  Simon R. FOSTER ,  Mark MCCLOY-STEVENS

IPC: G01R31/28 ,  G01R31/56

Abstract: The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.