公开(公告)号：US11451215B1

公开(公告)日：2022-09-20

申请号：US17343084

申请日：2021-06-09

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Miao Song ,  Xin Zhao ,  Tejasvi Das ,  Jason Wardlaw ,  Michael A. Kost

IPC: H03K3/011 ,  H03K4/08 ,  G06F1/04

Abstract: A piece-wise linear (PWL) waveform generator includes a current generator that generates a reference current, an output capacitor across which an output voltage is developed to form a PWL waveform, charging and discharging current sources for charging/discharging the output capacitor based on the reference current, a clock-controlled switch network for controlling the charging/discharging of the output capacitor, and a feedback control loop that senses the output voltage and controls the current generator to vary the reference current based on the output voltage. A first switch controlled by a first clock signal periodically connects/disconnects a current source output to/from a load impedance and a second switch controlled by a second clock signal periodically connects/disconnects a capacitor to/from the current source while disconnected from the load impedance. The capacitor capacitance is based on a predetermined voltage to mitigate glitching when the first switch connects the current source output to the load impedance.

公开(公告)号：US10658988B1

公开(公告)日：2020-05-19

申请号：US15943125

申请日：2018-04-02

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Miao Song ,  Xiaofan Franky Fei ,  Xin Zhao ,  Tejasvi Das ,  Lei Zhu ,  Jing Bai ,  Alan Mark Morton

IPC: H03F99/00 ,  H03F3/217 ,  H03F3/38 ,  H03F3/187 ,  H03F1/02 ,  H03G3/30 ,  H03F3/213

Abstract: A signal processing system may include a modulation stage configured to generate a modulated input signal, an open-loop switched mode driver coupled to the modulation stage and configured to generate an output signal from the modulated input signal, a voltage regulator configured to generate a supply voltage that supplies electrical energy to the open-loop switched mode driver, and a control subsystem configured to, when a magnitude of the modulated input signal falls below a threshold magnitude, control the voltage regulator to control the supply voltage such that the output signal varies non-linearly with the modulated input signal for magnitudes of the modulated input signal below the threshold magnitude.

公开(公告)号：US10236827B2

公开(公告)日：2019-03-19

申请号：US15622722

申请日：2017-06-14

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Lei Zhu ,  Ku He ,  Xin Zhao ,  Miao Song ,  Saurabh Singh ,  Vinod Jayakumar

IPC: H03F1/02 ,  H03F3/183 ,  H03F3/21 ,  H03F3/217 ,  H03F1/30 ,  H03F1/32 ,  H03F3/187

Abstract: A method may include, in an apparatus comprising a closed loop amplifier and a signal processing block configured to generate an amplifier input signal as a function of an upstream signal received at an input of the signal processing block, in a calibration mode of the apparatus: decoupling a second stage input of the amplifier from a first stage output of the amplifier; determining an offset signal that when applied to the input of a signal processing block as the upstream signal generates approximately zero as an intermediate signal generated by the first stage of the amplifier; and controlling one or more parameters of the apparatus based on the offset signal to compensate for an offset of at least one of the first stage and the signal processing block.