公开(公告)号：US20230003779A1

公开(公告)日：2023-01-05

申请号：US17668445

申请日：2022-02-10

Applicant: Cirrus Logic International Semiconductor Ltd.

Inventor： Saurabh SINGH ,  Chandra B. PRAKASH ,  Eric KIMBALL ,  Cory J. PETERSON ,  Ryan LOBO

IPC: G01R27/08

Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.