公开(公告)号：US10921619B2

公开(公告)日：2021-02-16

申请号：US16351079

申请日：2019-03-12

Applicant: Cisco Technology, Inc.

Inventor： Alexey V. Vert ,  Mark A. Webster

IPC: G02B6/10 ,  G02F1/035 ,  G02B6/12 ,  G02B6/26 ,  G02B6/42 ,  G02F1/025 ,  G02B6/132 ,  H01L21/02 ,  H01L21/20

Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.

公开(公告)号：US11067750B2

公开(公告)日：2021-07-20

申请号：US16259998

申请日：2019-01-28

Applicant: Cisco Technology, Inc.

Inventor： Alexey V. Vert ,  Vipulkumar K. Patel ,  Mark A. Webster

IPC: G02B6/122 ,  G02B6/293 ,  G02B6/136 ,  G02B6/12 ,  G02B6/30

Abstract: Embodiments disclosed herein generally relate to optical coupling between a highly-confined waveguide region and a low confined waveguide region in an optical device. The low confined waveguide region includes a trench in a substrate of the optical device in order to provide additional dielectric layer thickness for insulation between the substrate of the optical device and waveguides for light signals having a low optical mode. The low confined waveguide region is coupled to the highly-confined waveguide region via a waveguide overlap and in some embodiments via an intermediary coupling waveguide.

公开(公告)号：US11650439B2

公开(公告)日：2023-05-16

申请号：US17147004

申请日：2021-01-12

Applicant: Cisco Technology, Inc.

Inventor： Alexey V. Vert ,  Mark A. Webster

IPC: G02B6/10 ,  G02F1/035 ,  G02B6/12 ,  G02B6/26 ,  G02B6/42 ,  G02F1/025 ,  G02B6/132 ,  H01L21/02 ,  H01L21/20

CPC classification number: G02F1/025 ,  G02B6/132 ,  H01L21/02667 ,  H01L21/2022 ,  G02B2006/12142

Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.

公开(公告)号：US11480730B2

公开(公告)日：2022-10-25

申请号：US17304227

申请日：2021-06-16

Applicant: Cisco Technology, Inc.

Inventor： Alexey V. Vert ,  Vipulkumar K. Patel ,  Mark A. Webster

IPC: G02B6/122 ,  G02B6/12 ,  G02B6/136 ,  G02B6/293 ,  G02B6/30

Abstract: A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.