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公开(公告)号:US12038479B2
公开(公告)日:2024-07-16
申请号:US17941386
申请日:2022-09-09
Applicant: Cisco Technology, Inc.
Inventor: James Edwin Turman , ShiJie Wen , Jie Xue , Zoe Frances Conroy , Dao-I Tony Lin , Anthony Winston
IPC: G01R31/319 , G01R31/3183 , G01R31/3185
CPC classification number: G01R31/31903 , G01R31/318342 , G01R31/318594 , G01R31/31905
Abstract: A method, computer system, and computer program product are provided for stress-testing electronics using telemetry modeling. Telemetry data is received from one or more devices under test during a hardware testing phase, the telemetry data including one or more telemetry parameters. The telemetry data is processed using a predictive model to determine future values for the one or more telemetry parameters. Additional hardware testing is performed, wherein the additional hardware testing includes adjusting one or more testing components based on the determined future values.
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公开(公告)号:US20230076130A1
公开(公告)日:2023-03-09
申请号:US17590518
申请日:2022-02-01
Applicant: Cisco Technology, Inc.
Inventor: ShiJie Wen , Dao-I Tony Lin , Anthony Winston , Jie Xue , James Edwin Turman
Abstract: An approach is presented herein to use an in-situ algorithmic decision methodology during each stage of testing before 2C/4C to decide how long to test, how much margin should be used for each device under the test (DUT) to shorten or eliminate 2C/4C testing. Each DUT will be tested differently based on the risk level or the likelihood of failure at 2C/4C. To be able to achieve this, low-level hardware (HW) based sensors (on the printed circuit board assembly (PCBA), in power module, in silicon components, in silicon component complex, etc.) are used to collect telemetry data with a high frequency data acquisition rate during the testing. As testing is ongoing for each DUT, a margin distribution and algorithm modeling is performed in-situ.
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公开(公告)号:US20240085477A1
公开(公告)日:2024-03-14
申请号:US17941386
申请日:2022-09-09
Applicant: Cisco Technology, Inc.
Inventor: James Edwin Turman , ShiJie Wen , Jie Xue , Zoe Frances Conroy , Dao-I Tony Lin , Anthony Winston
IPC: G01R31/319 , G01R31/3183 , G01R31/3185
CPC classification number: G01R31/31905 , G01R31/318342 , G01R31/318594
Abstract: A method, computer system, and computer program product are provided for stress-testing electronics using telemetry modeling. Telemetry data is received from one or more devices under test during a hardware testing phase, the telemetry data including one or more telemetry parameters. The telemetry data is processed using a predictive model to determine future values for the one or more telemetry parameters. Additional hardware testing is performed, wherein the additional hardware testing includes adjusting one or more testing components based on the determined future values.
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公开(公告)号:US12164400B2
公开(公告)日:2024-12-10
申请号:US17590518
申请日:2022-02-01
Applicant: Cisco Technology, Inc.
Inventor: ShiJie Wen , Dao-I Tony Lin , Anthony Winston , Jie Xue , James Edwin Turman
Abstract: An approach is presented herein to use an in-situ algorithmic decision methodology during each stage of testing before 2C/4C to decide how long to test, how much margin should be used for each device under the test (DUT) to shorten or eliminate 2C/4C testing. Each DUT will be tested differently based on the risk level or the likelihood of failure at 2C/4C. To be able to achieve this, low-level hardware (HW) based sensors (on the printed circuit board assembly (PCBA), in power module, in silicon components, in silicon component complex, etc.) are used to collect telemetry data with a high frequency data acquisition rate during the testing. As testing is ongoing for each DUT, a margin distribution and algorithm modeling is performed in-situ.
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公开(公告)号:US20240320691A1
公开(公告)日:2024-09-26
申请号:US18187520
申请日:2023-03-21
Applicant: Cisco Technology, Inc.
Inventor: Shi-Jie Wen , Dao-I Tony Lin , Ranjani Ram , Li Sun , James Edwin Turman , Anthony Winston , Jie Xue
IPC: G06Q30/018 , H04Q9/00
CPC classification number: G06Q30/0185 , H04Q9/00
Abstract: Techniques are described for detecting counterfeit products by identifying differences between hardware components and orientations of the counterfeit products, and hardware components and orientations of authentic products. In some examples, the hardware components and orientations can be identified by generating hardware intrinsic development data based on telemetry data of products (or “devices”). By way of example, the telemetry data may be analyzed by machine learning (ML) models to generate representative models of the hardware intrinsic development data. In various examples, the representative models can include sample representative models of hardware intrinsic development data generated based on valid telemetry data of authentic devices. In those or other examples, the representative models can include other representative models (or “test representative models”) of hardware intrinsic development data generated based on unvalidated telemetry data of test devices. Comparisons between the representative models can be utilized to identify the counterfeit products.
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