公开(公告)号：US20240085477A1

公开(公告)日：2024-03-14

申请号：US17941386

申请日：2022-09-09

Applicant: Cisco Technology, Inc.

Inventor： James Edwin Turman ,  ShiJie Wen ,  Jie Xue ,  Zoe Frances Conroy ,  Dao-I Tony Lin ,  Anthony Winston

IPC: G01R31/319 ,  G01R31/3183 ,  G01R31/3185

CPC classification number: G01R31/31905 ,  G01R31/318342 ,  G01R31/318594

Abstract: A method, computer system, and computer program product are provided for stress-testing electronics using telemetry modeling. Telemetry data is received from one or more devices under test during a hardware testing phase, the telemetry data including one or more telemetry parameters. The telemetry data is processed using a predictive model to determine future values for the one or more telemetry parameters. Additional hardware testing is performed, wherein the additional hardware testing includes adjusting one or more testing components based on the determined future values.

公开(公告)号：US12164400B2

公开(公告)日：2024-12-10

申请号：US17590518

申请日：2022-02-01

Applicant: Cisco Technology, Inc.

Inventor： ShiJie Wen ,  Dao-I Tony Lin ,  Anthony Winston ,  Jie Xue ,  James Edwin Turman

IPC: G06F11/20 ,  G06F11/27 ,  G06F11/34

Abstract: An approach is presented herein to use an in-situ algorithmic decision methodology during each stage of testing before 2C/4C to decide how long to test, how much margin should be used for each device under the test (DUT) to shorten or eliminate 2C/4C testing. Each DUT will be tested differently based on the risk level or the likelihood of failure at 2C/4C. To be able to achieve this, low-level hardware (HW) based sensors (on the printed circuit board assembly (PCBA), in power module, in silicon components, in silicon component complex, etc.) are used to collect telemetry data with a high frequency data acquisition rate during the testing. As testing is ongoing for each DUT, a margin distribution and algorithm modeling is performed in-situ.

公开(公告)号：US12038479B2

公开(公告)日：2024-07-16

申请号：US17941386

申请日：2022-09-09

Applicant: Cisco Technology, Inc.

Inventor： James Edwin Turman ,  ShiJie Wen ,  Jie Xue ,  Zoe Frances Conroy ,  Dao-I Tony Lin ,  Anthony Winston

IPC: G01R31/319 ,  G01R31/3183 ,  G01R31/3185

CPC classification number: G01R31/31903 ,  G01R31/318342 ,  G01R31/318594 ,  G01R31/31905

Abstract: A method, computer system, and computer program product are provided for stress-testing electronics using telemetry modeling. Telemetry data is received from one or more devices under test during a hardware testing phase, the telemetry data including one or more telemetry parameters. The telemetry data is processed using a predictive model to determine future values for the one or more telemetry parameters. Additional hardware testing is performed, wherein the additional hardware testing includes adjusting one or more testing components based on the determined future values.

公开(公告)号：US20230076130A1

公开(公告)日：2023-03-09

申请号：US17590518

申请日：2022-02-01

Applicant: Cisco Technology, Inc.

Inventor： ShiJie Wen ,  Dao-I Tony Lin ,  Anthony Winston ,  Jie Xue ,  James Edwin Turman

IPC: G06F11/27 ,  G06F11/34

Abstract: An approach is presented herein to use an in-situ algorithmic decision methodology during each stage of testing before 2C/4C to decide how long to test, how much margin should be used for each device under the test (DUT) to shorten or eliminate 2C/4C testing. Each DUT will be tested differently based on the risk level or the likelihood of failure at 2C/4C. To be able to achieve this, low-level hardware (HW) based sensors (on the printed circuit board assembly (PCBA), in power module, in silicon components, in silicon component complex, etc.) are used to collect telemetry data with a high frequency data acquisition rate during the testing. As testing is ongoing for each DUT, a margin distribution and algorithm modeling is performed in-situ.

公开(公告)号：US09869643B2

公开(公告)日：2018-01-16

申请号：US14163756

申请日：2014-01-24

Applicant: Cisco Technology, Inc.

Inventor： ShiJie Wen ,  Richard J. Wong

IPC: G01N23/02

CPC classification number: G01N23/02 ,  G01N2223/313 ,  G01N2223/314 ,  G01N2223/6113 ,  G01N2223/646

Abstract: Masks that selectively attenuate radiation for inspections of printed circuit boards (PCB) are disclosed. A PCB may be inspected for defects by exposing the PCB with radiation and analyzing the radiation transmitted through the PCB. By employing a radiation mask having first and second segments between the PCB and a radiation source, the radiation may be selectively attenuated to attenuate a first portion of the radiation with a first attenuation level to prevent performance degradation to sensitive semiconductor devices as part of a first sectional area of the PCB, and yet provide substantially non-attenuation or attenuation at a second attenuation level for a second portion of the radiation incident upon a second sectional area of the PCB which is free from sensitive semiconductor devices. In this manner, the selective attenuation enables inspection of the first and second sectional areas of the PCB without damage to the sensitive semiconductor devices.