公开(公告)号：US09667407B1

公开(公告)日：2017-05-30

申请号：US15154567

申请日：2016-05-13

Applicant: Credo Technology Group Limited

Inventor： Xike Liu ,  Kei Peng ,  Chan Ho Yeung ,  YiFei Dai ,  Lawrence (Chi Fung) Cheng ,  Runsheng He

IPC: H04L7/00 ,  H04B10/61

CPC classification number: H04L7/0079 ,  H01F17/0006 ,  H03B5/1212 ,  H03B5/1228 ,  H03L7/07 ,  H03L7/0807 ,  H03L7/0812 ,  H03L7/091 ,  H03L7/099 ,  H04B10/6164 ,  H04B10/6165 ,  H04L7/0025 ,  H04L7/007 ,  H04L7/02

Abstract: A multichannel receiver includes multiple receiver modules, each having: a voltage-controlled oscillator that generates a clock signal with a controllable frequency; a phase interpolator that applies a controllable phase shift to the clock signal to provide a sampling signal; a sampling element that produces a digital receive signal by sampling an analog receive signal in accordance with the sampling signal; a timing error estimator that operates on the digital receive signal to provide timing error estimates; a phase control filter that derives, from the timing error estimates, a phase control signal supplied to the phase interpolator, wherein the phase control signal minimizes a phase error between the sampling signal and the analog receive signal; and a frequency control filter that derives, from the timing error estimates, a frequency control signal for controlling the clock signal frequency, wherein the frequency control signal minimizes a frequency offset between the clock signal and the analog receive signal.