公开(公告)号：US20220085771A1

公开(公告)日：2022-03-17

申请号：US17022221

申请日：2020-09-16

Applicant: Cree, Inc.

Inventor： Lei Zhao ,  Greg Durnan ,  Abdulrhman M. S. Ahmed

IPC: H03F3/195 ,  H03F1/02

Abstract: The present disclosure relates to an RF amplifier device including an IC chip including at least one transistor formed on a substrate, at least one operational circuit formed on the substrate and electrically coupled to the transistor, and a port configured to electrically couple the at least one operational circuit with operational circuitry outside the IC chip to adjust operation of the operational circuitry.

公开(公告)号：US20210399694A1

公开(公告)日：2021-12-23

申请号：US16905488

申请日：2020-06-18

Applicant: Cree, Inc.

Inventor： Lei Zhao ,  Fabian Radulescu

IPC: H03F3/195 ,  H03F1/02

Abstract: The present disclosure relates to added isolation between transistors in a multiple path amplifier circuit. The multiple path amplifier circuit includes a substrate, a first transistor on the substrate in a first path, and a second transistor on the substrate in a second path. The multiple path amplifier circuit also includes at least one electrical connection associated with the first and the second transistors and positioned to at least partially extend between the first path and the second path.

公开(公告)号：US11114396B2

公开(公告)日：2021-09-07

申请号：US16418361

申请日：2019-05-21

Applicant: Cree, Inc.

Inventor： Lei Zhao ,  Mario Bokatius

IPC: H03F3/68 ,  H01L23/00 ,  H01L27/088 ,  H01L25/065 ,  H03F1/02 ,  H01L23/66 ,  H01L25/00 ,  H03F3/213 ,  H03F1/56 ,  H01L29/417

Abstract: In a transistor formed on a semiconductor die mounted on a substrate, where the transistor output is connected to a circuit on the substrate, a bond pad electrically connected to a transistor drain finger manifold extends less than the full length of the manifold. By controlling the length of the bond pad, the parasitic capacitance it contributes may be controlled. In applications such as a Doherty amplifier, this parasitic capacitance forms part of the quarter-wave transmission line of an impedance inverter, and hence directly impacts amplifier performance. In particular, by reducing the parasitic capacitance contribution from transistor output bond pads, the bandwidth of a Doherty amplifier circuit may be improved. At GHz frequencies and with state of the art transistor device feature sizes, concerns about phase mismatch between drain finger outputs are largely moot.

公开(公告)号：US20200373265A1

公开(公告)日：2020-11-26

申请号：US16418361

申请日：2019-05-21

Applicant: Cree, Inc.

Inventor： Lei Zhao ,  Mario Bokatius

IPC: H01L23/00 ,  H01L29/417 ,  H01L27/088 ,  H01L25/065 ,  H03F1/02 ,  H01L23/66 ,  H01L25/00 ,  H03F3/213 ,  H03F1/56

Abstract: In a transistor formed on a semiconductor die mounted on a substrate, where the transistor output is connected to a circuit on the substrate, a bond pad electrically connected to a transistor drain finger manifold extends less than the full length of the manifold. By controlling the length of the bond pad, the parasitic capacitance it contributes may be controlled. In applications such as a Doherty amplifier, this parasitic capacitance forms part of the quarter-wave transmission line of an impedance inverter, and hence directly impacts amplifier performance. In particular, by reducing the parasitic capacitance contribution from transistor output bond pads, the bandwidth of a Doherty amplifier circuit may be improved. At GHz frequencies and with state of the art transistor device feature sizes, concerns about phase mismatch between drain finger outputs are largely moot.

公开(公告)号：US20220102294A1

公开(公告)日：2022-03-31

申请号：US17039043

申请日：2020-09-30

Applicant: Cree, Inc.

Inventor： Lei Zhao ,  Fabian Radulescu

IPC: H01L23/66 ,  H01L23/48 ,  H01L23/528 ,  H01L23/552 ,  H01L27/06 ,  H01L29/06 ,  H01L29/20 ,  H01L29/778 ,  H01L29/78 ,  H03F3/21 ,  H03F1/02

Abstract: The present disclosure relates to a semiconductor device with isolation and/or protection structures. A semiconductor device can include a substrate, a first transistor and a second transistor, wherein the first transistor and the second transistor are formed on the substrate, and an isolation structure formed on the substrate. The isolation structure can be formed on the substrate between the first transistor and the second transistor. The isolation structure can be configured to isolate the first transistor and the second transistor.

公开(公告)号：US20220037464A1

公开(公告)日：2022-02-03

申请号：US16944002

申请日：2020-07-30

Applicant: Cree, Inc.

Inventor： Lei Zhao ,  Fabian Radulescu

IPC: H01L29/06 ,  H01L23/66 ,  H01L29/78 ,  H01L29/778

Abstract: A transistor amplifier package includes a base, one or more transistor dies on the base, first and second leads coupled to the one or more transistor dies and defining respective radio frequency (RF) signal paths, and an isolation structure on the base between the respective RF signal paths. The isolation structure includes first and second wire bonds. The first and second wire bonds may have a crossed configuration defining at least one cross point therebetween. Related wire bond-based isolation structures are also discussed.