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公开(公告)号：US11837559B2
公开(公告)日：2023-12-05
申请号：US17211281
申请日：2021-03-24
Applicant: Cree, Inc.
Inventor： Michael E. Watts , Mario Bokatius , Jangheon Kim , Basim Noori , Qianli Mu , Kwangmo Chris Lim , Marvin Marbell
IPC: H01L23/66 , H01L23/00 , H01L29/20 , H01L29/417 , H01L29/778
CPC classification number: H01L23/66 , H01L24/49 , H01L29/2003 , H01L29/41775 , H01L29/7786 , H01L2223/6611 , H01L2223/6616 , H01L2223/6655 , H01L2223/6683 , H01L2224/49107 , H01L2924/13064 , H01L2924/1421 , H01L2924/30111
Abstract: RF amplifiers are provided that include an interconnection structure and a Group III nitride-based RF amplifier die that is mounted on top of the interconnection structure. The Group III nitride-based RF amplifier die includes a semiconductor layer structure. A plurality of unit cell transistors are provided in an upper portion of the semiconductor layer structure, and a gate terminal, a drain terminal and a source terminal are provided on a lower surface of the semiconductor layer structure that is adjacent the interconnection structure.
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公开(公告)号：US20210313286A1
公开(公告)日：2021-10-07
申请号：US17211281
申请日：2021-03-24
Applicant: Cree, Inc
Inventor： Michael E. Watts , Mario Bokatius , Jangheon Kim , Basim Noori , Qianli Mu , Kwangmo Chris Lim , Marvin Marbell
IPC: H01L23/66 , H01L29/20 , H01L23/00 , H01L29/778 , H01L29/417
Abstract: RF amplifiers are provided that include an interconnection structure and a Group III nitride-based RF amplifier die that is mounted on top of the interconnection structure. The Group III nitride-based RF amplifier die includes a semiconductor layer structure. A plurality of unit cell transistors are provided in an upper portion of the semiconductor layer structure, and a gate terminal, a drain terminal and a source terminal are provided on a lower surface of the semiconductor layer structure that is adjacent the interconnection structure.
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公开(公告)号：US11114396B2
公开(公告)日：2021-09-07
申请号：US16418361
申请日：2019-05-21
Applicant: Cree, Inc.
Inventor： Lei Zhao , Mario Bokatius
IPC: H03F3/68 , H01L23/00 , H01L27/088 , H01L25/065 , H03F1/02 , H01L23/66 , H01L25/00 , H03F3/213 , H03F1/56 , H01L29/417
Abstract: In a transistor formed on a semiconductor die mounted on a substrate, where the transistor output is connected to a circuit on the substrate, a bond pad electrically connected to a transistor drain finger manifold extends less than the full length of the manifold. By controlling the length of the bond pad, the parasitic capacitance it contributes may be controlled. In applications such as a Doherty amplifier, this parasitic capacitance forms part of the quarter-wave transmission line of an impedance inverter, and hence directly impacts amplifier performance. In particular, by reducing the parasitic capacitance contribution from transistor output bond pads, the bandwidth of a Doherty amplifier circuit may be improved. At GHz frequencies and with state of the art transistor device feature sizes, concerns about phase mismatch between drain finger outputs are largely moot.
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Patent Agency Ranking
公开(公告)号：US11114988B2
公开(公告)日：2021-09-07
申请号：US16421999
申请日：2019-05-24
Applicant: Cree, Inc.
Inventor： Jangheon Kim , Sonoko Aristud , Michael E. Watts , Mario Bokatius
Abstract: In a Doherty amplifier, outputs of first (main) and second (peak) transistors are connected by a combined impedance inverter and harmonic termination circuit. The harmonic termination circuit incorporates a predetermined part of the impedance inverter, and provides a harmonic load impedance at a targeted harmonic frequency (e.g., the second harmonic). Control of the amplitude and phase of the harmonic load impedance facilitates shaping of the drain current and voltage waveforms to maximize gain and efficiency, while maintaining a good load modulation at a fundamental frequency. Particularly for Group III nitride semiconductors, such as GaN, both harmonic control and output impedance matching circuits may be eliminated from the outputs of each transistor. The combined impedance inverter and harmonic termination circuit reduces the amplifier circuit footprint, for high integration and low power consumption.
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公开(公告)号：US20220254762A1
公开(公告)日：2022-08-11
申请号：US17168251
申请日：2021-02-05
Applicant: Cree, Inc.
Inventor： Michael E. Watts , James Krehbiel , Mario Bokatius
IPC: H01L25/16 , H01L23/00 , H01L23/367 , H01L23/66
Abstract: A semiconductor device package includes a first and a second input lead and a plurality of uniform transistor-based components, the plurality of uniform transistor-based components comprising a first subset of the uniform transistor-based components coupled to the first input lead and a second subset of the uniform transistor-based components coupled to the second input lead. The first subset and the second subset are arranged in an asymmetric configuration with respect to one another.
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公开(公告)号：US20210313935A1
公开(公告)日：2021-10-07
申请号：US17215456
申请日：2021-03-29
Applicant: Cree, Inc.
Inventor： Basim Noori , Marvin Marbell , Qianli Mu , Kwangmo Chris Lim , Michael E. Watts , Mario Bokatius , Jangheon Kim
IPC: H03F1/56 , H01L23/48 , H01L29/778 , H01L23/498 , H01L23/00 , H03F3/193
Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.
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公开(公告)号：US20200373892A1
公开(公告)日：2020-11-26
申请号：US16421999
申请日：2019-05-24
Applicant: Cree, Inc.
Inventor： Jangheon Kim , Sonoko Aristud , Michael E. Watts , Mario Bokatius
Abstract: In a Doherty amplifier, outputs of first (main) and second (peak) transistors are connected by a combined impedance inverter and harmonic termination circuit. The harmonic termination circuit incorporates a predetermined part of the impedance inverter, and provides a harmonic load impedance at a targeted harmonic frequency (e.g., the second harmonic). Control of the amplitude and phase of the harmonic load impedance facilitates shaping of the drain current and voltage waveforms to maximize gain and efficiency, while maintaining a good load modulation at a fundamental frequency. Particularly for Group III nitride semiconductors, such as GaN, both harmonic control and output impedance matching circuits may be eliminated from the outputs of each transistor. The combined impedance inverter and harmonic termination circuit reduces the amplifier circuit footprint, for high integration and low power consumption.
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公开(公告)号：US20200373265A1
公开(公告)日：2020-11-26
申请号：US16418361
申请日：2019-05-21
Applicant: Cree, Inc.
Inventor： Lei Zhao , Mario Bokatius
IPC: H01L23/00 , H01L29/417 , H01L27/088 , H01L25/065 , H03F1/02 , H01L23/66 , H01L25/00 , H03F3/213 , H03F1/56
Abstract: In a transistor formed on a semiconductor die mounted on a substrate, where the transistor output is connected to a circuit on the substrate, a bond pad electrically connected to a transistor drain finger manifold extends less than the full length of the manifold. By controlling the length of the bond pad, the parasitic capacitance it contributes may be controlled. In applications such as a Doherty amplifier, this parasitic capacitance forms part of the quarter-wave transmission line of an impedance inverter, and hence directly impacts amplifier performance. In particular, by reducing the parasitic capacitance contribution from transistor output bond pads, the bandwidth of a Doherty amplifier circuit may be improved. At GHz frequencies and with state of the art transistor device feature sizes, concerns about phase mismatch between drain finger outputs are largely moot.
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