Floating point round-off amount determination processors, methods, systems, and instructions
    1.
    发明授权
    Floating point round-off amount determination processors, methods, systems, and instructions 有权
    浮点数四舍五入确定处理器,方法,系统和说明

    公开(公告)号:US09513871B2

    公开(公告)日:2016-12-06

    申请号:US13977257

    申请日:2011-12-30

    IPC分类号: G06F7/483 G06F9/30 G06F7/499

    摘要: A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. A result including one or more result floating point data elements is stored in the destination storage location in response to the floating point round-off amount determination instruction. Each of the one or more result floating point data elements includes a difference between a corresponding floating point data element of the source in a corresponding position, and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. Other methods, apparatus, systems, and instructions are disclosed.

    摘要翻译: 一种方面的方法包括接收浮点舍入量确定指令。 该指令指示一个或多个浮点数据元素的源,指示小数点之后的小数位数,并指示目的地存储位置。 包括一个或多个结果浮点数据元素的结果响应于浮点舍入量确定指令被存储在目的地存储位置中。 一个或多个结果浮点数据元素中的每一个包括相应位置的源的相应浮点数据元素与已被舍入到指示的源的相应浮点数据元素的舍入版本之间的差 小数位数。 公开了其它方法,装置,系统和指令。

    FLOATING POINT ROUND-OFF AMOUNT DETERMINATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
    2.
    发明申请
    FLOATING POINT ROUND-OFF AMOUNT DETERMINATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS 有权
    浮动点关闭金额确定处理器,方法,系统和指令

    公开(公告)号:US20140195580A1

    公开(公告)日:2014-07-10

    申请号:US13977257

    申请日:2011-12-30

    IPC分类号: G06F7/483

    摘要: A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. A result including one or more result floating point data elements is stored in the destination storage location in response to the floating point round-off amount determination instruction. Each of the one or more result floating point data elements includes a difference between a corresponding floating point data element of the source in a corresponding position, and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. Other methods, apparatus, systems, and instructions are disclosed.

    摘要翻译: 一种方面的方法包括接收浮点舍入量确定指令。 该指令指示一个或多个浮点数据元素的源,指示小数点之后的小数位数,并指示目的地存储位置。 包括一个或多个结果浮点数据元素的结果响应于浮点舍入量确定指令被存储在目的地存储位置中。 一个或多个结果浮点数据元素中的每一个包括相应位置的源的相应浮点数据元素与已被舍入到指示的源的相应浮点数据元素的舍入版本之间的差 小数位数。 公开了其它方法,装置,系统和指令。

    APPARATUS AND METHOD OF IMPROVED PERMUTE INSTRUCTIONS
    5.
    发明申请
    APPARATUS AND METHOD OF IMPROVED PERMUTE INSTRUCTIONS 有权
    改进的说明书的装置和方法

    公开(公告)号:US20130290687A1

    公开(公告)日:2013-10-31

    申请号:US13976993

    申请日:2011-12-23

    IPC分类号: G06F9/30

    摘要: An apparatus is described having instruction execution logic circuitry. The instruction execution logic circuitry has input vector element routing circuitry to perform the following for each of three different instructions: for each of a plurality of output vector element locations, route into an output vector element location an input vector element from one of a plurality of input vector element locations that are available to source the output vector element. The output vector element and each of the input vector element locations are one of three available bit widths for the three different instructions. The apparatus further includes masking layer circuitry coupled to the input vector element routing circuitry to mask a data structure created by the input vector routing element circuitry. The masking layer circuitry is designed to mask at three different levels of granularity that correspond to the three available bit widths.

    摘要翻译: 描述了具有指令执行逻辑电路的装置。 指令执行逻辑电路具有输入向量元素路由电路,以对三个不同的指令中的每一个执行以下操作:对于多个输出向量元素位置中的每一个,将输入向量元素从多个 可用于输出输出向量元素的输入向量元素位置。 输出向量元素和每个输入向量元素位置是三个不同指令的三个可用位宽之一。 该装置还包括耦合到输入向量元素路由电路以屏蔽由输入向量路由选择元件电路产生的数据结构的掩蔽层电路。 掩蔽层电路被设计为以与三个可用位宽对应的三个不同的粒度级别进行掩蔽。

    APPARATUS AND METHOD FOR PERFORMING PERMUTE OPERATIONS
    6.
    发明申请
    APPARATUS AND METHOD FOR PERFORMING PERMUTE OPERATIONS 有权
    用于执行操作的装置和方法

    公开(公告)号:US20150026439A1

    公开(公告)日:2015-01-22

    申请号:US13995974

    申请日:2011-12-22

    IPC分类号: G06F9/30

    摘要: An apparatus and method are described for permuting data elements with masking. For example, a method according to one embodiment includes the following operations: reading values from a mask data structure to determine whether masking is implemented for each data element of a destination operand; if masking not implemented for a particular data element, then selecting data elements from a first source operand and a second source operand based on index values stored in destination operand to be copied to data element positions within the destination operand, wherein any one of the data elements from either the first source operand and the second source operand may be copied to any one of the data element positions within the destination operand; and if masking is implemented for a particular data element of the destination operand, then performing a designated masking operation with respect to that particular data element.

    摘要翻译: 描述了用掩模来置换数据元素的装置和方法。 例如,根据一个实施例的方法包括以下操作:从掩模数据结构读取值以确定是否对目的地操作数的每个数据元素实施掩蔽; 如果对于特定数据元素没有被实现掩蔽,则基于存储在目的地操作数中的索引值从第一源操作数和第二源操作数中选择数据元素以被复制到目的地操作数中的数据元素位置,其中数据中的任何一个 可以将来自第一源操作数和第二源操作数的元素复制到目的地操作数中的任何一个数据元素位置; 并且如果针对目的地操作数的特定数据元素实现掩蔽,则对该特定数据元素执行指定的掩蔽操作。

    Apparatus and method of improved extract instructions
    9.
    发明授权
    Apparatus and method of improved extract instructions 有权
    改进提取指令的装置和方法

    公开(公告)号:US09588764B2

    公开(公告)日:2017-03-07

    申请号:US13976998

    申请日:2011-12-23

    IPC分类号: G06F9/30

    摘要: An apparatus is described that includes instruction execution circuitry to execute first, second, third, and fourth instructions, the first and second instructions select a first group of input vector elements from one of multiple first non-overlapping sections of respective first and second input vectors. Each of the multiple first non-overlapping sections have a same bit width as the first group. Both the third and fourth instructions select a second group of input vector elements from one of multiple second non overlapping sections of respective third and fourth input vectors. The second group has a second bit width that is larger than the first bit width. Each of multiple second non overlapping sections have a same bit width as the second group. The apparatus includes masking layer circuitry to mask the first and second groups at a first granularity and second granularity.

    摘要翻译: 描述了一种装置,其包括执行第一,第二,第三和第四指令的指令执行电路,第一和第二指令从第一和第二输入向量的多个第一非重叠部分之一中选择第一组输入向量元素 。 多个第一非重叠部分中的每一个具有与第一组相同的位宽度。 第三和第四指令都从相应的第三和第四输入向量的多个第二非重叠部分之一中选择第二组输入向量元素。 第二组具有比第一位宽大的第二位宽度。 多个第二非重叠部分中的每一个具有与第二组相同的位宽度。 该装置包括掩蔽层电路,以第一粒度和第二粒度掩蔽第一和第二组。

    PACKED ROTATE PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
    10.
    发明申请
    PACKED ROTATE PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS 有权
    包装旋转处理器,方法,系统和指令

    公开(公告)号:US20140040604A1

    公开(公告)日:2014-02-06

    申请号:US13977229

    申请日:2011-12-30

    IPC分类号: G06F9/30

    CPC分类号: G06F9/30032 G06F9/30036

    摘要: A method of an aspect includes receiving a masked packed rotate instruction. The instruction indicates a first source packed data including a plurality of packed data elements, a packed data operation mask having a plurality of mask elements, at least one rotation amount, and a destination storage location. A result packed data is stored in the destination storage location in response to the instruction. The result packed data includes result data elements that each correspond to a different one of the mask elements in a corresponding relative position. Result data elements that are not masked out by the corresponding mask element include one of the data elements of the first source packed data in a corresponding position that has been rotated. Result data elements that are masked out by the corresponding mask element include a masked out value. Other methods, apparatus, systems, and instructions are disclosed.

    摘要翻译: 一种方面的方法包括接收掩蔽的包装旋转指令。 指示指示包括多个打包数据元素的第一源打包数据,具有多个掩码元素的打包数据操作掩码,至少一个旋转量和目的地存储位置。 响应于该指令,结果打包数据被存储在目的地存储位置。 结果打包数据包括每个对应于相应相对位置中的不同掩模元素的结果数据元素。 未被对应的掩码元素掩蔽的结果数据元素包括在已经旋转的对应位置中的第一源打包数据的数据元素中的一个。 由相应的掩码元素屏蔽的结果数据元素包括一个被屏蔽的值。 公开了其它方法,装置,系统和指令。