公开(公告)号：US20150115314A1

公开(公告)日：2015-04-30

申请号：US14381238

申请日：2013-03-04

Applicant: DENSO CORPORATION

Inventor： Kazuki Arakawa ,  Masakiyo Sumitomo ,  Masaki Matsui ,  Yasushi Higuchi ,  Kazuhiro Oyama

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/739

CPC classification number: H01L29/42376 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/7397

Abstract: In a semiconductor device, a trench includes a first trench that has an opening portion on a surface of a base layer, and a second trench that is communicated with the first trench and in which a distance between opposed side walls is greater than opposed side walls of the first trench and a bottom portion is located in a drift layer. A wall surface of a connecting portion of the second trench connecting to the first trench is rounded. Therefore, an occurrence of a large electrical field concentration in the vicinity of the connecting portion between the first trench and the second trench can be suppressed. Also, when electrons are supplied from a channel region to the drift layer, it is less likely that a flow direction of the electrons will be sharply changed in the vicinity of the connecting portion. Therefore, an on-state resistance can be reduced.

Abstract translation: 在半导体器件中，沟槽包括在基底层的表面上具有开口部分的第一沟槽和与第一沟槽连通并且相对的侧壁之间的距离大于相对侧壁的第二沟槽 的第一沟槽和底部部分位于漂移层中。 连接到第一沟槽的第二沟槽的连接部分的壁表面是圆形的。 因此，可以抑制在第一沟槽和第二沟槽之间的连接部分附近出现大的电场集中。 此外，当从沟道区域向漂移层提供电子时，在连接部附近电子的流动方向不会急剧变化。 因此，可以降低导通电阻。

公开(公告)号：US20150048413A1

公开(公告)日：2015-02-19

申请号：US14386132

申请日：2013-05-13

Applicant: DENSO CORPORATION

Inventor： Kazuki Arakawa ,  Masakiyo Sumitomo ,  Masaki Matsui ,  Yasushi Higuchi

IPC: H01L29/739 ,  H01L29/423 ,  H01L29/78 ,  H01L29/10

CPC classification number: H01L29/7397 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7813

Abstract: A semiconductor device includes: a drift layer; a base layer arranged in a surface portion of the drift layer; multiple trenches penetrating the base layer and reaching the drift layer; and a gate electrode arranged on the gate insulation film in each trench. Each trench includes: a first trench having an opening on a surface of the base layer; and a second trench connecting the first trench and having a portion, of which a distance between facing sidewalls of the second trench is longer than a distance between facing sidewalls of the first trench. The opening of each first trench is sealed with the gate electrode. An inside of each gate electrode includes a cavity portion.

Abstract translation: 半导体器件包括：漂移层; 布置在所述漂移层的表面部分中的基底层; 多个沟槽穿透基层并到达漂移层; 以及在每个沟槽中布置在栅极绝缘膜上的栅电极。 每个沟槽包括：在基底层的表面上具有开口的第一沟槽; 以及第二沟槽，其连接所述第一沟槽并具有一部分，所述第二沟槽的所述第二沟槽的相对侧壁之间的距离比所述第一沟槽的相对侧壁之间的距离长。 每个第一沟槽的开口用栅电极密封。 每个栅电极的内部包括空腔部分。