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公开(公告)号:US12135345B2
公开(公告)日:2024-11-05
申请号:US17942216
申请日:2022-09-12
Applicant: DENSO CORPORATION
Inventor: Takasuke Ito , Tomohiro Nezuka , Yasuaki Aoki , Yuuta Nakamura , Takashi Yoshiya
IPC: G01R29/02 , G01R19/165
Abstract: In a pulse edge detection circuit, a measurement circuit has a comparator provided therein which compares a voltage with a reference voltage and outputs a pulse signal. An RSFF puts a signal in a high level at a timing at which detecting a rise edge due to a change of the pulse signal to the high level. In such manner, a set signal of an RSFF becomes inactive and a reset signal of the RSFF becomes active, and a fall edge of the pulse signal becomes detectable. When a fall edge is generated due to a change of the pulse signal from the high level to the low level, the set signal of the RSFF becomes active, and a signal becomes high level.
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公开(公告)号:US11831302B2
公开(公告)日:2023-11-28
申请号:US17550887
申请日:2021-12-14
Applicant: DENSO CORPORATION
Inventor: Yuuta Nakamura , Yasuaki Aoki , Hideji Yoshida , Takashi Yoshiya , Tomohiro Nezuka , Akimasa Niwa
IPC: H03K17/042 , H02M1/08 , H02M1/00 , H02M7/537 , H03K17/687
CPC classification number: H03K17/04206 , H02M1/0009 , H02M1/08 , H02M7/537 , H03K17/687
Abstract: A drive circuit drives a switch configuring a power converter. The drive circuit divides an inter-terminal voltage of a switch. The drive circuit includes a differential circuit having first and second input terminals to which the divided inter-terminal voltages are inputted. The differential circuit outputs an analog voltage based on a voltage difference between the input terminals. The differential circuit executes reset of the output voltage, and with the voltage difference when reset is canceled after reset is executed as a reference voltage, outputs an analog voltage in which an amount of change from the reference voltage is multiplied by an amplification factor. The drive circuit outputs a binary signal based on comparison results between a threshold and the analog voltage outputted from the differential circuit, and sets a transfer rate of a gate charge of the switch when a driving state is switched, based on the output signal thereof.
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公开(公告)号:US11946956B2
公开(公告)日:2024-04-02
申请号:US17545033
申请日:2021-12-08
Applicant: DENSO CORPORATION
Inventor: Takasuke Itou , Tomohiro Nezuka , Yasuaki Aoki , Yuuta Nakamura , Takashi Yoshiya
IPC: G01R19/165 , H03F3/04 , H03K5/24
CPC classification number: G01R19/165 , H03F3/04 , H03K5/24
Abstract: A signal detection circuit detects, as a detection target signal, a signal of a main terminal of a switching element by comparing the detection target signal with a reference signal. The signal detection circuit includes: a signal generation unit generating the reference signal; a first capacitor having a first terminal connected with the main terminal of the switching element; a second capacitor having a first terminal connected with an output terminal of the signal generation unit; and a detection circuit receiving, as input signals, a signal output from a second terminal of the first capacitor and a signal output from a second terminal of the second capacitor, and the detection circuit detecting the detection target signal based on the input signals.
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公开(公告)号:US11784612B2
公开(公告)日:2023-10-10
申请号:US17545035
申请日:2021-12-08
Applicant: DENSO CORPORATION
Inventor: Takasuke Itou , Tomohiro Nezuka , Yasuaki Aoki , Yuuta Nakamura , Takashi Yoshiya
CPC classification number: H03F3/005 , G11C27/024 , H03F3/45
Abstract: A signal detection circuit includes: a first capacitor having a first terminal connected with a first main terminal of a switching element; a second capacitor having a first terminal connected with a second main terminal of the switching element; and a detection circuit having a differential circuit configuration. The detection circuit receives, as input signals, a signal from a second terminal of the first capacitor and a signal from a second terminal of the second capacitor, detects detection target signals based on the input signals. The detection target signals include a signal of the first main terminal of the switching element and a signal of the second main terminal of the switching element.
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