摘要:
A power stage includes a power transistor and a driver, the power transistor comprising a collector, a gate and an emitter and being configured to change over from a saturated state to an off state and vice versa in accordance with a control from the driver, the power stage comprising a resistor Rg positioned between the driver and the gate, the power stage comprising a circuit for compensating for delays that is positioned in parallel with the resistor Rg, comprising: a circuit for compensating for turn-on initialization delays, which is configured to divert the current from the resistor Rg when a saturation of the power transistor is initialized, a circuit for compensating for turn-off initialization delays, which is configured to divert the current from the resistor Rg when a switching-off of the power transistor is initialized, a circuit for compensating for delays that is configured to divert the current from the resistor Rg when the power transistor is close to the saturated state.
摘要:
Semiconductor devices for driving transistors in a power device are described. A semiconductor device can include a voltage source configured to provide a fixed bias voltage to a first device implemented as a common gate device. The semiconductor device can further include a second device connected in series with the first device. The current output of the second device can be connected to a source terminal of the first device. The semiconductor device can further include a driver configured to drive the second device to perform current control on the first device.
摘要:
The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology.
摘要:
A radio frequency (RF) switch includes a switchable RF path including a plurality of transistors coupled in series; a gate bias network including a plurality of resistors, wherein the gate bias network is coupled to each of the plurality of transistors in the switchable RF path; and a bypass network including a first plurality of transistors coupled in parallel to each of the plurality of transistors in the switchable RF path and a second plurality of transistors coupled in parallel to each of the plurality of resistors in the gate bias network.
摘要:
A circuit arrangement is provided where the arrangement of a feedback resistor between a first branch and a second branch enables that a voltage is provided at an output terminal in an efficient way, this means with a high settling speed and a low current consumption. The feedback resistor is arranged between a reference node and the output terminal, where the reference node is connected to a current mirror. The circuit arrangement can be employed as a gate driver. Furthermore, a driver block and a method of driving a circuit arrangement are provided.
摘要:
The present invention provides a control circuit and a control method for a switch circuit and a switching-mode power supply circuit. The control method comprises following steps: detecting an output voltage or an output current, and adjusting an upper limit value and a lower limit value of an inductor current according to a result of comparing the output voltage or the output current with the corresponding reference; and sampling the inductor current, and controlling a main switch transistor in the circuit to be switched off when a sampling current rises to the upper limit value, and controlling the main switch transistor to be switched on when the sampling current drops to the lower limit value. In the present invention, the inductor current is fast in response without overshoot, the output voltage drops very little, there is no overshoot in a process of voltage recovery, and circuit transient response is fast.
摘要:
A radio frequency (RF) switch which comprises an RF domain section having a plurality of RF switching elements. A DC domain section is provided having circuitry configured for controlling the RF switching elements in response to one or more control signals. A resistive load is provided between the RF domain section and the DC domain section. A bypass circuit is configured for selectively bypassing at least a portion of the resistive load.
摘要:
An electronic circuit includes an input configured to receive an input signal and an output configured to be coupled to load, an output transistor including a load path and a control node, the load path being connected between the output and a first supply node, a drive transistor including a load path and a control node, the load path being connected to the control node of the output transistor, a first electronic switch connected in series with the load path of the drive transistor, a biasing circuit including an internal impedance and connected between the control node of the drive transistor and the first supply node, and a control circuit configured to receive the input signal and to drive the first electronic switch based on the input signal.
摘要:
A circuit includes an electronic switch with an isolated gate, a measuring device for determining a charge at the isolated gate, and an energy supply for providing charge to the isolated gate based on the charge determined by the measuring device.
摘要:
An apparatus for performing level shift control in an electronic device includes an input stage positioned in a level shifter of the electronic device, and an output stage positioned in the level shifter and coupled to the input stage through a set of intermediate nodes. The input stage is arranged for receiving at least one input signal of the level shifter through at least one input terminal of the input stage and controlling voltage levels of the set of intermediate nodes according to the at least one input signal. The input stage includes a hybrid current control circuit coupled to the at least one input terminal and arranged for performing current control for the input stage. The hybrid current control circuit is equipped with multiple sets of parallel paths for controlling currents passing through the set of intermediate nodes, respectively, each set may include two or more paths in parallel.