Synchronization of time accurate strobe (TAS) messages
    1.
    发明授权
    Synchronization of time accurate strobe (TAS) messages 有权
    时间精确选通(TAS)消息的同步

    公开(公告)号:US08537945B1

    公开(公告)日:2013-09-17

    申请号:US12951047

    申请日:2010-11-21

    IPC分类号: H04L7/00

    CPC分类号: H04J3/0685

    摘要: An apparatus includes Radio Frequency (RF) circuitry and baseband circuitry. The RF circuitry is configured to receive strobe messages that are based on a system clock over a digital interface, and to communicate synchronously with the system clock based on the received strobe messages in accordance with a Radio Access Technology (RAT) that is selected from among multiple different RATs. The baseband circuitry is configured to generate the strobe messages, to delay the strobe messages by a delay that depends on the selected RAT, and to send the delayed strobe messages to the RF circuitry over the digital interface.

    摘要翻译: 一种装置包括射频(RF)电路和基带电路。 RF电路被配置为接收基于数字接口上的系统时钟的选通消息,并且根据所接收的选通消息,根据从无线接入技术(RAT)中选择的无线电接入技术(RAT)与系统时钟同步地通信系统时钟。 多种不同的RAT。 基带电路被配置为产生选通消息,以使选通消息延迟取决于所选择的RAT的延迟,并且通过数字接口将延迟的选通消息发送到RF电路。

    Power-efficient variable-clock-rate DIGRF interface
    5.
    发明授权
    Power-efficient variable-clock-rate DIGRF interface 有权
    功率高效的可变时钟速率DIGRF接口

    公开(公告)号:US08724758B2

    公开(公告)日:2014-05-13

    申请号:US13342992

    申请日:2012-01-04

    IPC分类号: H04L7/00

    摘要: A method in a communication device includes exchanging data between a Baseband Integrated Circuit (BBIC) and a Radio Frequency Integrated Circuit (RFIC) over a digital interface having a variable clock rate. The clock rate of the digital interface is modified repeatedly during a communication session conducted by the communication device, in response to changes in a current operational state of the communication device during the communication session, to a lowest clock rate that is suitable for the current operational state, so as to reduce a power consumption of the communication device.

    摘要翻译: 通信装置中的方法包括通过具有可变时钟速率的数字接口在基带集成电路(BBIC)和射频集成电路(RFIC)之间交换数据。 在由通信设备进行的通信会话期间,响应于在通信会话期间通信设备的当前操作状态的变化,数字接口的时钟速率被重新修改到适合当前操作的最低时钟速率 状态,以便降低通信设备的功耗。

    POWER-EFFICIENT DIGRF INTERFACE
    6.
    发明申请
    POWER-EFFICIENT DIGRF INTERFACE 有权
    功率高达DIGRF接口

    公开(公告)号:US20120177163A1

    公开(公告)日:2012-07-12

    申请号:US13342992

    申请日:2012-01-04

    IPC分类号: H04L7/00 H04L7/033

    摘要: A method in a communication device includes exchanging data between a Baseband Integrated Circuit (BBIC) and a Radio Frequency Integrated Circuit (RFIC) over a digital interface having a variable clock rate. The clock rate of the digital interface is modified during a communication session conducted by the communication device.

    摘要翻译: 通信装置中的方法包括通过具有可变时钟速率的数字接口在基带集成电路(BBIC)和射频集成电路(RFIC)之间交换数据。 在由通信设备进行的通信会话期间,修改数字接口的时钟速率。