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    Method and apparatus for supplying a reference voltage for chip-to-chip communication
    1.
    发明授权
    Method and apparatus for supplying a reference voltage for chip-to-chip communication 有权
    用于提供用于芯片到芯片通信的参考电压的方法和装置

    公开(公告)号：US06891406B2

    公开(公告)日：2005-05-10

    申请号：US10339754

    申请日：2003-01-09

    申请人： Daniel Mark Dreps ,  James Douglas Jordan ,  Joel David Ziegelbein

    发明人： Daniel Mark Dreps ,  James Douglas Jordan ,  Joel David Ziegelbein

    IPC分类号： H04L25/03 ,  H04L25/02 ,  H04L25/06 ,  H03F3/45

    CPC分类号： H04L25/06

    摘要： A method for receiving data by an integrated circuitry chip includes receiving data signals and a first clock signal sent by a sending chip. The data signals are received by data receivers and the clock signal is received by at least one clock receiver of the receiving chip. A reference voltage is derived by reference voltage circuitry for the receiving chip responsive to the first clock signal. Logical states of the received data signals are detected. The detecting includes the data receivers comparing voltage levels of the received data signals to the derived reference voltage.

    摘要翻译： 一种用于由集成电路芯片接收数据的方法包括接收由发送芯片发送的数据信号和第一时钟信号。 数据信号由数据接收器接收，时钟信号由接收芯片的至少一个时钟接收器接收。 参考电压由对应于第一时钟信号的接收芯片的参考电压电路导出。 检测出接收到的数据信号的逻辑状态。 该检测包括数据接收器，将接收的数据信号的电压电平与导出的参考电压进行比较。

    Evaluation of a code segment
    2.
    发明授权
    Evaluation of a code segment 失效
    评估代码段

    公开(公告)号：US07496906B2

    公开(公告)日：2009-02-24

    申请号：US10815208

    申请日：2004-03-31

    申请人： Elizabeth Ann Black-Ziegelbein ,  Oltea Mihaela Herescu ,  Joel David Ziegelbein

    发明人： Elizabeth Ann Black-Ziegelbein ,  Oltea Mihaela Herescu ,  Joel David Ziegelbein

    IPC分类号： G06F9/45

    CPC分类号： G06F11/3664 ,  G06F11/3624 ,  G06F11/3668

    摘要： Methods, systems, and media to test a code segment of a source file are disclosed. Various embodiments machine-render a source code skeleton in response to a selection of the code segment, incorporate the code segment into the source code skeleton to generate a temporary source file, insert a monitoring statement into the temporary source file, and compile the temporary source file into a compiled program to output a result. Embodiments may further include executing the compiled program and outputting the result. In addition, some embodiments also initiate compilation of the temporary source file, attempt to resolve a compilation error, and output the compilation error. Some embodiments terminate execution in response to selection of a cancel button. Further, some embodiments delete the temporary source file. Several embodiments also include a file creator, a code gatherer, a code generator, an adaptive compiler, a processor, and an output device.

    摘要翻译： 公开了测试源文件的代码段的方法，系统和媒体。 各种实施例机器 - 响应于代码段的选择来呈现源代码框架，将代码段合并到源代码框架中以生成临时源文件，将监视语句插入到临时源文件中，并编译临时源 将文件转换为编译程序以输出结果。 实施例还可以包括执行编译的程序并输出结果。 另外，一些实施例还启动临时源文件的编译，尝试解决编译错误并输出编译错误。 一些实施例响应于取消按钮的选择终止执行。 此外，一些实施例删除临时源文件。 几个实施例还包括文件创建者，代码采集器，代码生成器，自适应编译器，处理器和输出设备。

    Method, structure, and computer program product for implementing high frequency return current paths within electronic packages
    4.
    发明授权
    Method, structure, and computer program product for implementing high frequency return current paths within electronic packages 失效
    用于实现电子封装内高频返回电流路径的方法，结构和计算机程序产品

    公开(公告)号：US06993739B2

    公开(公告)日：2006-01-31

    申请号：US10682135

    申请日：2003-10-09

    申请人： Darryl John Becker ,  Daniel Douriet ,  Matthew Stephen Doyle ,  Andrew B. Maki ,  Joel David Ziegelbein

    发明人： Darryl John Becker ,  Daniel Douriet ,  Matthew Stephen Doyle ,  Andrew B. Maki ,  Joel David Ziegelbein

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5068 ,  G06F17/5036

    摘要： A method, structure and computer program product are provided for implementing high frequency return current paths within electronic packages. Electronic package physical design data is received for identifying a design layout. For each of a plurality of cells in a grid of a set cell size within the identified design layout, a respective number of signal vias, reference voltage vias, and ground vias are identified. A signal to reference via ratio is calculated for each of the plurality of cells. Each cell having a calculated signal to reference via ratio greater than a target ratio is identified. Vias are selectively added within each of the identified cells for providing high frequency return current paths.

    摘要翻译： 提供了一种方法，结构和计算机程序产品，用于在电子封装内实现高频返回电流路径。 收到电子包物理设计数据，用于识别设计布局。 对于所识别的设计布局内的设置单元尺寸的网格中的多个单元格中的每一个，识别相应数量的信号通孔，参考电压通孔和接地通孔。 针对多个单元中的每个单元计算信号到参考通孔比。 识别具有大于目标比率的计算出的参考通路比的信号的每个单元。 选择性地在每个所识别的单元中添加通孔以提供高频返回电流路径。