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公开(公告)号：US20240196531A1
公开(公告)日：2024-06-13
申请号：US18586336
申请日：2024-02-23
申请人： DexCom, Inc.
发明人： Sean Frick , Louis Jung , David Lari
IPC分类号： H05K1/11 , A61B5/00 , A61B5/145 , A61B5/1468 , G01N27/327 , H01L21/768 , H01L23/48 , H05K1/02 , H05K1/14 , H05K3/40
CPC分类号： H05K1/112 , A61B5/6802 , H01L21/768 , H01L23/481 , H05K1/0262 , H05K3/403 , A61B5/14532 , A61B5/14546 , A61B5/1468 , A61B5/6848 , G01N27/327 , H05K1/0219 , H05K1/141 , H05K2201/0394 , H05K2201/049 , H05K2201/0792 , H05K2201/09063 , H05K2201/09181 , H05K2201/10151 , H05K2201/10378
摘要： An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.
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公开(公告)号：US20240186206A1
公开(公告)日：2024-06-06
申请号：US18438450
申请日：2024-02-10
申请人： Intel Corporation
发明人： Satish PRATHABAN , Ramaswamy PARTHASARATHY , Biswajit PATRA , Tongyan ZHAI , Jeff KU , Min Suet LIM , Yi HUANG , Kai XIAO , Gene F. YOUNG , Weimin SHI
IPC分类号： H01L23/367 , H01L23/00 , H01L23/427 , H01L25/065 , H01L25/18 , H05K1/02
CPC分类号： H01L23/367 , H01L23/427 , H01L25/0655 , H01L25/18 , H05K1/0203 , H05K1/0262 , H01L24/16 , H01L2224/16225 , H01L2924/1427 , H01L2924/15311
摘要： Systems, apparatuses and methods may provide for technology that includes a voltage regulator, a board assembly including a die and a circuit board electrically coupled to a first side of the die, and a thermal dissipation assembly thermally and electrically coupled to a second side of the die, wherein the thermal dissipation assembly is further electrically coupled to the voltage regulator. In one example, the thermal dissipation assembly includes a vapor chamber and the technology further includes a plurality of copper plates electrically coupled to the voltage regulator and a package substrate containing the die, wherein the plurality of copper plates are further thermally coupled to the vapor chamber.
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公开(公告)号：US20230397325A1
公开(公告)日：2023-12-07
申请号：US17831726
申请日：2022-06-03
发明人： Unnikrishnan VADAKKANMARU VEEDU , Silvia Anali SOTO DE LA TORRE , Alexander LYAKHOV , Krishna BHARATH , Fenghua SHEN , Madhavi TADEPALLI
IPC分类号： H05K1/02 , H01L23/467 , H05K7/20
CPC分类号： H05K1/0262 , H01L23/467 , H05K7/20154 , H05K1/0203
摘要： Technology is disclosed for a computing system with a printed circuit board having a top and bottom; an integrated circuit component coupled to the top of the board; a passive heat exchanger coupled to the top of the board and spaced from the integrated circuit component; at least one electronic component coupled to the printed circuit board below the top of the printed circuit board; and at least one heat pipe having an evaporator end adjacent the electronic component and extending away from the evaporator end along the bottom of the board to a condenser end above the top of the board, the condenser end being thermally coupled to the passive heat exchanger on the top of the board; wherein heat from electronic component is moved away from the electronic component and the integrated circuit component to the passive heat exchanger.
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公开(公告)号：US11744009B2
公开(公告)日：2023-08-29
申请号：US17477530
申请日：2021-09-17
申请人： CYNTEC CO., LTD.
发明人： Kaipeng Chiang , Da-Jung Chen , Bau-Ru Lu , Chun Hsien Lu
CPC分类号： H05K1/0262 , H05K1/0209 , H05K1/141
摘要： An electronic module, such as a VRM, has a power inductor and power wave pins disposed on a bottom surface of a circuit board so as to reduce the size and increase the heat dissipation capability of the VRM.
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公开(公告)号：US09974187B2
公开(公告)日：2018-05-15
申请号：US13867243
申请日：2013-04-22
申请人： Martin Standing , Andrew Roberts , Milko Paolucci
发明人： Martin Standing , Andrew Roberts , Milko Paolucci
CPC分类号： H05K1/189 , H05K1/0262
摘要： Representative implementations of devices and techniques provide off-board power conversion. A power cable is arranged to distribute power from a power supply to a peripheral component. An active circuit is integrated into the cable, converting the power en route from the power supply to the peripheral component.
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6.发明申请公开(公告)号：US20180116051A1
公开(公告)日：2018-04-26
申请号：US15847852
申请日：2017-12-19
申请人： MEDIATEK INC.
发明人： Sheng-Ming Chang , Chia-Hui Liu , Shih-Chieh Lin , Chun-Ping Chen
CPC分类号： H05K1/115 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L24/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/181 , H05K1/0262 , H05K1/0298 , H05K1/05 , H05K1/111 , H05K1/114 , H05K1/181 , H05K2201/09227 , H05K2201/095 , H05K2201/09509 , H05K2201/10378 , H05K2201/10674 , H05K2201/10734 , H01L2924/00012 , H01L2924/00
摘要： A microelectronic system includes a base and a semiconductor package mounted on the base. The base includes an internal conductive layer and a build-up layer on the internal conductive layer. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P, and the power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.
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公开(公告)号：US09918380B2
公开(公告)日：2018-03-13
申请号：US15208944
申请日：2016-07-13
申请人： FUJITSU LIMITED
发明人： Hajime Murakami
CPC分类号： H05K1/023 , G06F1/183 , G06F1/184 , H01L2924/15174 , H01L2924/15311 , H05K1/0216 , H05K1/0262 , H05K1/113 , H05K1/115 , H05K1/144 , H05K2201/042 , H05K2201/1031 , H05K2201/10371 , H05K2201/10378 , H05K2201/10734 , Y02P70/611
摘要： A noise reduction board includes: a first board; a second board arranged under the first board; a plurality of power feeding parts made of a metal in a shape of a pole and configured to electrically interconnect the first board and the second board; and a noise reduction part arranged between the power feeding parts, wherein the noise reduction part includes: a metal plate; an insulator configured to cover a surface of the metal plate; a first terminal provided on the side of the first board of the metal plate and electrically coupled to a ground pattern of the first board; and a second terminal provided on the side of the second board of the metal plate and electrically coupled to a ground pattern of the second board.
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公开(公告)号：US20170332483A1
公开(公告)日：2017-11-16
申请号：US15586312
申请日：2017-05-04
发明人： Yasuo FUJII , Hiroaki HORI
CPC分类号： H05K1/0231 , H01G2/06 , H01G4/012 , H01G4/232 , H01G4/248 , H01G4/30 , H01G4/35 , H01G4/40 , H03H7/38 , H05K1/0262 , H05K1/115 , H05K1/181 , H05K3/303 , H05K2201/10015 , H05K2201/10522 , H05K2201/10545 , H05K2201/10734 , Y02P70/611
摘要： A wiring board is provided with power supply patterns for each type of power supply of an IC. An IC has a plurality of power supply terminals for each type of power supply. For each type of power supply, two or more laminated capacitors are provided in parallel between the power supply of IC and a ground. Two or more laminated capacitors provided for each type of power supply include a laminated capacitor having a Q factor of less than about 0.5. For each type of power supply, in order to satisfy a target impedance, two or more laminated capacitors are arranged and distributed such that at least half of the plurality of power supply terminals are included in a region obtained by combining cover areas.
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9.发明授权公开(公告)号：US09752938B2
公开(公告)日：2017-09-05
申请号：US14269877
申请日：2014-05-05
发明人： Tetsuo Sato , Ryotaro Kudo
IPC分类号： G01K7/00 , G01K1/02 , G01K3/00 , G01K7/01 , G06F1/20 , G06F1/26 , H01L23/34 , H05K1/02 , G01K3/14
CPC分类号： G01K7/00 , G01K1/026 , G01K3/00 , G01K7/01 , G01K2003/145 , G06F1/206 , G06F1/26 , H01L23/34 , H01L2924/0002 , H05K1/0201 , H05K1/0262 , H05K2201/10151 , H05K2201/10166 , H05K2203/163 , Y02D10/16 , H01L2924/00
摘要： An apparatus, in one embodiment, can include a configuration including a plurality of heat generation devices. The apparatus also includes a plurality of thermal sensors respectively, operably connected to each of the plurality of heat generation devices, wherein each thermal sensor of the plurality of thermal sensors includes a respective output terminal configured to provide a voltage representative of the temperature of the respective heat generation device. The apparatus further includes an output circuit configured to output the highest temperature information among the heat generation devices. The output terminals of the plurality of thermal sensors are tied together. A corresponding method is also discussed.
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公开(公告)号：US09722231B2
公开(公告)日：2017-08-01
申请号：US14230603
申请日：2014-03-31
IPC分类号： H01M10/04 , H01M2/22 , B60R16/03 , H02J7/00 , H01M10/058 , H01M2/12 , H01M2/10 , H01M2/24 , H01M2/20 , H01M2/34 , H01H47/32 , H01M10/48 , H05K1/18 , H05K3/32 , B60L11/18 , H01M2/30 , H01M10/6551 , B60L1/00 , B60L1/02 , B60L1/14 , B60L3/00 , B60L3/12 , B60L11/12 , B60L11/14 , B60L15/20 , B60R16/033 , H01M10/42 , G01R31/36 , H01R12/71 , H05K1/02 , H02H7/18 , G01R31/02 , H01M2/32 , H01M4/66
CPC分类号： H01M2/22 , B60L1/003 , B60L1/02 , B60L1/14 , B60L3/0046 , B60L3/12 , B60L11/123 , B60L11/14 , B60L11/1803 , B60L11/1851 , B60L11/1861 , B60L11/1864 , B60L11/1874 , B60L11/1877 , B60L11/1879 , B60L15/20 , B60L2210/10 , B60L2210/40 , B60L2240/34 , B60L2240/545 , B60L2240/547 , B60L2240/549 , B60L2250/10 , B60L2260/26 , B60L2270/20 , B60R16/03 , B60R16/033 , G01R31/025 , G01R31/362 , G01R31/3627 , H01H47/325 , H01M2/1077 , H01M2/1205 , H01M2/1211 , H01M2/1252 , H01M2/20 , H01M2/206 , H01M2/24 , H01M2/305 , H01M2/32 , H01M2/34 , H01M2/342 , H01M4/661 , H01M4/665 , H01M10/04 , H01M10/0413 , H01M10/058 , H01M10/425 , H01M10/4257 , H01M10/482 , H01M10/486 , H01M10/6551 , H01M2010/4271 , H01M2010/4278 , H01M2200/103 , H01M2220/20 , H01M2250/20 , H01R12/716 , H02H7/18 , H02J7/0021 , H02J7/0063 , H05K1/0262 , H05K1/0263 , H05K1/18 , H05K3/32 , H05K2201/10492 , H05K2201/1053 , H05K2201/10545 , Y02T10/6217 , Y02T10/645 , Y02T10/7005 , Y02T10/7016 , Y02T10/7044 , Y02T10/705 , Y02T10/7061 , Y02T10/7077 , Y02T10/7216 , Y02T10/7241 , Y02T10/7275 , Y10T29/49108 , Y10T29/4911 , Y10T29/49114
摘要： A battery system having a bladed fuse connector and a method of operation of the bladed fuse connector are provided. The system may, in certain embodiments, include a printed circuit board (PCB) and a high current interconnect. The high current interconnect may be mounted to and extending upward from the PCB. The battery system may also include a fuse. The fuse may limit an amount of current flowing through the battery system. Additionally, the battery system may include a bladed fuse connector coupled between the high current interconnect and the fuse. The bladed fuse connector may carry a current between the high current interconnect and the fuse. To that end, the bladed fuse connector may include an S-shaped bend between the high current interconnect and the fuse.
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