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1.发明授权System and method of enhancing efficiency and utilization of memory bandwidth in reconfigurable hardware 有权提高可重构硬件内存带宽的效率和利用率的系统和方法公开(公告)号：US07149867B2
公开(公告)日：2006-12-12
申请号：US10869200
申请日：2004-06-16
IPC分类号： G06F12/00
CPC分类号： G06F9/3455 , G06F9/383 , G06F12/0862 , G06F15/7846 , G06F2212/601 , G06F2212/6026 , G06F2212/6028
摘要： A reconfigurable processor that includes a computational unit and a data prefetch unit coupled to the computational unit, where the data prefetch unit retrieves data from a memory and supplies the data to the computational unit through memory and a data access unit, and where the data prefetch unit, memory, and data access unit is configured by a program. Also, a reconfigurable hardware system that includes a common memory; and one or more reconfigurable processors coupled to the common memory, where at least one of the reconfigurable processors includes a data prefetch unit to read and write data between the unit and the common memory, and where the data prefetch unit is configured by a program executed on the system. In addition, a method of transferring data that includes transferring data between a memory and a data prefetch unit in a reconfigurable processor; and transferring the data between a computational unit and the data prefetch unit.
摘要翻译： 一种可重构处理器，其包括耦合到计算单元的计算单元和数据预取单元，其中数据预取单元从存储器检索数据，并通过存储器和数据存取单元将数据提供给计算单元，并且其中数据预取 单元，存储器和数据访问单元由程序配置。 而且，包括公共存储器的可重新配置的硬件系统; 以及耦合到公共存储器的一个或多个可重配置处理器，其中至少一个可重构处理器包括用于在单元和公共存储器之间读取和写入数据的数据预取单元，并且其中数据预取单元由执行的程序配置 在系统上 另外，一种传输数据的方法，包括在可重构处理器中的存储器和数据预取单元之间传送数据; 以及在计算单元和数据预取单元之间传送数据。
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2.发明授权System and method for computational unification of heterogeneous implicit and explicit processing elements 有权用于异构隐式和显式处理元素的计算统一的系统和方法公开(公告)号：US08713518B2
公开(公告)日：2014-04-29
申请号：US13287322
申请日：2011-11-02
申请人： David Pointer , David E. Caliga
发明人： David Pointer , David E. Caliga
IPC分类号： G06F9/44
摘要： A system and method for computational unification of heterogeneous implicit and explicit processing elements which supports the aggregation of any number of such processing elements. The system and method of the present invention supports the generation of a unified executable program through the use of directive statements which are analyzed in conjunction with the semantic structures in the parsed source code to generate appropriate source code targeted to the implicit and explicit processing elements. The computational unification system and method of the present invention further embodies expertise with the particular programming style and idiom of the various processing elements.
摘要翻译： 用于支持任意数量的这种处理单元的聚合的异构隐式和显式处理元件的计算统一的系统和方法。 本发明的系统和方法通过使用指令语句来支持统一的可执行程序，这些指令语句结合解析的源代码中的语义结构进行分析，以生成针对隐式和显式处理单元的适当的源代码。 本发明的计算统一系统和方法进一步体现了具有各种处理元件的特定编程风格和成语的专业知识。
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3.发明授权Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions 有权用于增强计算功能的并行性和性能的多自适应处理系统和技术公开(公告)号：US07225324B2
公开(公告)日：2007-05-29
申请号：US10285318
申请日：2002-10-31
申请人： Jon M. Huppenthal , David E. Caliga
发明人： Jon M. Huppenthal , David E. Caliga
IPC分类号： G06F17/00
CPC分类号： G06F15/8023
摘要： Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions are disclosed which can be employed in a myriad of applications including multi-dimensional pipeline computations for seismic applications, search algorithms, information security, chemical and biological applications, filtering and the like as well as for systolic wavefront computations for fluid flow and structures analysis, bioinformatics etc. Some applications may also employ both the multi-dimensional pipeline and systolic wavefront methodologies disclosed.
摘要翻译： 公开了用于增强计算功能的并行性和性能的多自适应处理系统和技术，其可以在无数应用中使用，包括用于地震应用的多维管道计算，搜索算法，信息安全性，化学和生物学应用，过滤和 以及用于流体流动和结构分析，生物信息学等的收缩波前计算。一些应用还可以采用所公开的多维管道和收缩波前方法。
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4.发明授权Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions 有权用于增强计算功能的并行性和性能的多自适应处理系统和技术公开(公告)号：US07620800B2
公开(公告)日：2009-11-17
申请号：US11733064
申请日：2007-04-09
申请人： Jon M. Huppenthal , David E. Caliga
发明人： Jon M. Huppenthal , David E. Caliga
IPC分类号： G06F15/82
CPC分类号： G06F15/8023
摘要： Multi-adaptive processing systems and techniques for enhancing parallelism and performance of computational functions are disclosed which can be employed in a myriad of applications including multi-dimensional pipeline computations for seismic applications, search algorithms, information security, chemical and biological applications, filtering and the like as well as for systolic wavefront computations for fluid flow and structures analysis, bioinformatics etc. Some applications may also employ both the multi-dimensional pipeline and systolic wavefront methodologies disclosed.
摘要翻译： 公开了用于增强计算功能的并行性和性能的多自适应处理系统和技术，其可以在无数应用中使用，包括用于地震应用的多维管道计算，搜索算法，信息安全性，化学和生物学应用，过滤和 以及用于流体流动和结构分析，生物信息学等的收缩波前计算。一些应用还可以采用所公开的多维管道和收缩波前方法。
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5.发明申请公开(公告)号：US20120117535A1
公开(公告)日：2012-05-10
申请号：US13287322
申请日：2011-11-02
申请人： David Pointer , David E. Caliga
发明人： David Pointer , David E. Caliga
IPC分类号： G06F9/44
摘要： A system and method for computational unification of heterogeneous implicit and explicit processing elements which supports the aggregation of any number of such processing elements. The system and method of the present invention supports the generation of a unified executable program through the use of directive statements which are analyzed in conjunction with the semantic structures in the parsed source code to generate appropriate source code targeted to the implicit and explicit processing elements. The computational unification system and method of the present invention further embodies expertise with the particular programming style and idiom of the various processing elements.
摘要翻译： 用于支持任意数量的这种处理单元的聚合的异构隐式和显式处理元件的计算统一的系统和方法。 本发明的系统和方法通过使用指令语句来支持统一的可执行程序，这些指令语句结合解析的源代码中的语义结构进行分析，以生成针对隐式和显式处理单元的适当的源代码。 本发明的计算统一系统和方法进一步体现了具有各种处理元件的特定编程风格和成语的专业知识。
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