公开(公告)号：US08593846B2

公开(公告)日：2013-11-26

申请号：US13199002

申请日：2011-08-17

申请人： David A. Helsley ,  Allan T. Mitchell

发明人： David A. Helsley ,  Allan T. Mitchell

IPC分类号： G11C27/00

CPC分类号： H03F3/45475 ,  H03F2203/45546 ,  H03F2203/45548

摘要： An analog floating gate circuit (10-3, 10-4) includes a first sense transistor (21, 3), a first storage capacitor (20, 5), and first (24, 4) and second (31A, 42) tunneling regions. Various portions of a first floating gate conductor (12, 2) form a floating gate of the first sense transistor, a floating first plate of the first storage capacitor (20, 5), a floating first plate of the first tunneling region, and a floating first plate of the second tunneling region, respectively. A second plate of the first storage capacitor is coupled to a first reference voltage (VREF, GND), and a second plate of the second tunneling region is coupled to a second reference voltage (VPROG/GND). Compensation circuitry (44-1, 44-2) is coupled to the first floating gate conductor, for compensating loss of trapped charge from the first floating gate conductor.