Precision timed delay measurement using phaselocked CW technique
    1.
    发明授权
    Precision timed delay measurement using phaselocked CW technique 失效
    使用锁相CW技术的精确定时延迟测量

    公开(公告)号:US5384541A

    公开(公告)日:1995-01-24

    申请号:US26933

    申请日:1993-03-05

    摘要: A method and apparatus for the measuring of a delay in a delay circuit by making a continuous frequency measurement is proposed. The phase-locking of a variable frequency signal applied to the delay circuit allows the user to significantly improve the precision and accuracy of the time delay measurement. A scheme to extract the number of cycles stored in the delay circuit is also disclosed.

    摘要翻译: 提出了通过进行连续频率测量来测量延迟电路中的延迟的方法和装置。 施加到延迟电路的可变频率信号的相位锁定允许用户显着提高时间延迟测量的精度和精度。 还公开了提取存储在延迟电路中的周期数的方案。

    MMIC transient capture apparatus and method
    2.
    发明授权
    MMIC transient capture apparatus and method 失效
    MMIC瞬态捕获装置及方法

    公开(公告)号:US5264800A

    公开(公告)日:1993-11-23

    申请号:US946037

    申请日:1992-09-15

    申请人: Alistair D. Black

    发明人: Alistair D. Black

    IPC分类号: H03K5/26 H03K5/22

    CPC分类号: H03K5/26

    摘要: A Monolithic Microwave Integrated Circuit (MMIC) for capturing transients in the GHz range is disclosed. The device includes a transmission line formed in a GaAs substrate. The transmission line includes a number of threshold devices forming shunts on the transmission line. The threshold devices are positioned at predetermined locations with respect to one another. A reference signal and an unknown signal are counter-propagated along the transmission line. When the two signals collide, they produce a collision voltage which exceeds the threshold voltage of the threshold devices. The voltage information is distributed along the predetermined length of several threshold devices. Thus, amplitude, phase, and timing information regarding the two signals may be obtained. This information may be utilized for triggering, clock interpolation, data demodulation, and other applications.

    摘要翻译: 公开了用于捕获GHz范围内瞬态的单片微波集成电路(MMIC)。 该器件包括形成在GaAs衬底中的传输线。 传输线包括在传输线上形成分路的多个阈值装置。 阈值装置相对于彼此定位在预定位置。 参考信号和未知信号沿着传输线反向传播。 当两个信号碰撞时,它们产生超过阈值装置的阈值电压的碰撞电压。 电压信息沿着若干阈值装置的预定长度分布。 因此,可以获得关于两个信号的振幅,相位和定时信息。 该信息可用于触发,时钟插值,数据解调和其他应用。

    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
    3.
    发明授权
    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 有权
    光纤通道仲裁环路无缓冲开关电路,增加带宽,而不会显着增加成本

    公开(公告)号:US07450500B2

    公开(公告)日:2008-11-11

    申请号:US10348997

    申请日:2003-01-21

    IPC分类号: H04L12/26 H04L12/56 H04J3/04

    摘要: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

    摘要翻译: 公开了一种通过FCAL交换机传输数据的交换机,交换架构和过程。 该开关使用多个开关控制电路,每个开关控制电路都耦合到一个FCAL网络,并且都连接到交叉开关。 开关控制电路通过协议总线耦合在一起用于协调目的。 每个FCAL循环都可能发生本地会话,并且通过交换机交叉的会话可以同时发生。 OPN原语用于在传输任何数据之前建立连接,从而无需开关控制电路中的缓冲存储器。 每个OPN的目的地地址用于寻址每个交换机控制电路中的查找表,以确定目的地节点是否是本地的。 如果没有,则查找目的地并在协议总线上进行连接请求。 如果远程端口不忙,它将发送一个应答,这两个端口通过背板交叉开关建立数据路径。

    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost

    公开(公告)号:US07430171B2

    公开(公告)日:2008-09-30

    申请号:US10345707

    申请日:2003-01-15

    IPC分类号: H04L1/00 H04L12/56 H04L12/43

    摘要: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
    5.
    发明授权
    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 失效
    光纤通道仲裁环路无缓冲开关电路,增加带宽,而不会显着增加成本

    公开(公告)号:US07366190B2

    公开(公告)日:2008-04-29

    申请号:US10348642

    申请日:2003-01-21

    IPC分类号: H04L12/28 H04L12/42 H04L12/66

    摘要: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which. causes both ports to establish a data path through the backplane crossbar switch.

    摘要翻译: 公开了一种通过FCAL交换机传输数据的交换机,交换架构和过程。 该开关使用多个开关控制电路,每个开关控制电路都耦合到一个FCAL网络,并且都连接到交叉开关。 开关控制电路通过协议总线耦合在一起用于协调目的。 每个FCAL循环都可能发生本地会话,并且通过交换机交叉的会话可以同时发生。 OPN原语用于在传输任何数据之前建立连接,从而无需开关控制电路中的缓冲存储器。 每个OPN的目的地地址用于寻址每个交换机控制电路中的查找表,以确定目的地节点是否是本地的。 如果没有,则查找目的地并在协议总线上进行连接请求。 如果远程端口不忙,它会发回应答。 导致两个端口通过背板交叉开关建立数据路径。

    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
    6.
    发明授权
    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 失效
    光纤通道仲裁环路无缓冲开关电路,增加带宽,而不会显着增加成本

    公开(公告)号:US06614796B1

    公开(公告)日:2003-09-02

    申请号:US09195846

    申请日:1998-11-19

    IPC分类号: H04L1256

    摘要: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL [net]work and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

    摘要翻译: 公开了一种通过FCAL交换机传输数据的交换机,交换架构和过程。 该开关使用多个开关控制电路,每个开关控制电路都耦合到一个FCAL [net]功能,并且都连接到交叉开关。 开关控制电路通过协议总线耦合在一起用于协调目的。 每个FCAL循环都可能发生本地会话,并且通过交换机交叉的会话可以同时发生。 OPN原语用于在传输任何数据之前建立连接,从而无需开关控制电路中的缓冲存储器。 每个OPN的目的地地址用于寻址每个交换机控制电路中的查找表,以确定目的地节点是否是本地的。 如果没有,则查找目的地并在协议总线上进行连接请求。 如果远程端口不忙,它将发送一个应答,这两个端口通过背板交叉开关建立数据路径。

    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
    7.
    发明授权
    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 有权
    光纤通道仲裁环路无缓冲开关电路,增加带宽,而不会显着增加成本

    公开(公告)号:US08798091B2

    公开(公告)日:2014-08-05

    申请号:US12149373

    申请日:2008-04-30

    IPC分类号: H04L12/43 H04J3/24

    摘要: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

    摘要翻译: 公开了一种通过FCAL交换机传输数据的交换机,交换架构和过程。 该开关使用多个开关控制电路,每个开关控制电路都耦合到一个FCAL网络,并且都连接到交叉开关。 开关控制电路通过协议总线耦合在一起用于协调目的。 每个FCAL循环都可能发生本地会话,并且通过交换机交叉的会话可以同时发生。 OPN原语用于在传输任何数据之前建立连接,从而无需开关控制电路中的缓冲存储器。 每个OPN的目的地地址用于寻址每个交换机控制电路中的查找表,以确定目的地节点是否是本地的。 如果没有,则查找目的地并在协议总线上进行连接请求。 如果远程端口不忙,它将发送一个应答,这两个端口通过背板交叉开关建立数据路径。

    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
    8.
    发明授权
    Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 有权
    光纤通道仲裁环路无缓冲开关电路,增加带宽,而不会显着增加成本

    公开(公告)号:US08767756B2

    公开(公告)日:2014-07-01

    申请号:US12292440

    申请日:2008-11-19

    IPC分类号: H04L12/56

    摘要: A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive us used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

    摘要翻译: 公开了一种通过FCAL交换机传输数据的交换机,交换架构和过程。 该开关使用多个开关控制电路,每个开关控制电路都耦合到一个FCAL网络,并且都连接到交叉开关。 开关控制电路通过协议总线耦合在一起用于协调目的。 每个FCAL循环都可能发生本地会话,并且通过交换机交叉的会话可以同时发生。 OPN原语我们用于在传输任何数据之前建立连接,从而无需开关控制电路中的缓冲存储器。 每个OPN的目的地地址用于寻址每个交换机控制电路中的查找表,以确定目的地节点是否是本地的。 如果没有,则查找目的地并在协议总线上进行连接请求。 如果远程端口不忙,它将发送一个应答,这两个端口通过背板交叉开关建立数据路径。