摘要:
The invention relates to electronic devices whose electronic properties can surprisingly be improved to a significant degree by inserting at least one crosslinkable polymeric buffer layer, preferably a cationically crosslinkable polymeric buffer layer, between the conductive doped polymer and the organic semiconductor layer. Particularly good properties are obtained with a buffer layer in which crosslinking is thermally induced, i.e. by raising the temperature to 50 to 250° C. Alternatively, crosslinking can be radiation-induced by adding a photoacid. Moreover, such a buffer layer can be advantageously applied by means of printing techniques, especially inkjet printing, as the ideal temperature for the thermal treatment is independent of the glass transition temperature of the material. This avoids having to rely on material that has a low molecular weight, making it possible to apply the layer by means of printing techniques. The next layer (the organic semiconductor layer) can also be applied with the aid of different printing techniques, particularly inkjet printing, because the buffer layer is rendered insoluble by the crosslinking process, thus preventing the buffer layer from solubilizing thereafter.
摘要:
The invention provides low molecular weight or polymeric organic materials in which at least one hydrogen atom is replaced by a group of the formula (A) where R is alkyl group, alkoxyalkyl group, alkoxy group, thioalkoxy group, aryl group or alkenyl group, in each of which one or more hydrogen atoms may be replaced and one or more nonadjacent carbon atoms may be replaced. Z is —O—, —S—, —CO—, —COO—, —O—CO— or a bivalent group —(CR1R2)n— in which R1 and R2 are hydrogen, alkyl, alkoxy, alkoxyalkyl or thioalkoxy group, aryl or alkenyl, in each of which one or more hydrogen atoms may be replaced and one or more nonadjacent carbon atoms may be replaced, and n is an integer from 1 to 20. X is a bivalent group —(CR1R2)n— and, with the proviso that the number of these A groups is limited by the maximum number of available substitutable hydrogen atoms. The invention also relates to their use for producing optionally multilayered structured light emitting diodes, lasers, solar cells, waveguides or integrated circuits.
摘要翻译:本发明提供了低分子量或聚合有机材料,其中至少一个氢原子被式(A)的基团取代,其中R是烷基,烷氧基烷基,烷氧基,硫代烷氧基,芳基或烯基,在 其中每个可以被一个或多个氢原子取代,并且一个或多个不相邻的碳原子可被取代。 Z是-O,-S-,-CO-,-COO-,-O-CO-或其中R 1和R 2是氢,烷基,烷氧基,烷氧基烷基或硫代烷氧基的二价基 - (CR 1 R 2)n - 芳基或链烯基,其中每个可以被一个或多个氢原子取代,并且一个或多个不相邻的碳原子可以被取代,并且n是1至20的整数.X是二价基团 - (CR 1 R 2)n - 条件是这些A基团的数目受可用的可取代氢原子的最大数量的限制。 本发明还涉及其用于生产任选多层结构发光二极管,激光器,太阳能电池,波导或集成电路的用途。
摘要:
In a method for manufacturing an electric motor comprising a rotor and a stator a placeholder for a temperature sensor is inserted in the axial direction between a first coil layer and an adjacent second coil layer of a winding head such that the placeholder is situated in a gap-shaped recess extending between the first and the second coil layers, the first coil layer is then pressed onto a circumferential surface of the placeholder and onto the second coil layer and is plastically deformed such that a space between the lateral surfaces of the two coil layers and the circumferential surface of the placeholder is reduced, and a contact surface between the lateral surface of the first coil layer and the circumferential surface of the placeholder is enlarged. By removing the placeholder, a receiving chamber is subsequently formed in the winding head, into which a temperature sensor is then inserted.
摘要:
To generate an output signal (11) the frequency of which is twice the frequency of an input signal (1, 2), a delayed signal (3, 4) which is delayed relative to the input signal (1, 2) by a quarter of the latter's cycle period is generated and the output signal (11) is then generated as the difference between the rectified input signal (1, 2) and the rectified delayed signal (3, 4). The input signal (1, 2) and the delayed signal (3, 4) are advantageously rectified by using differential signals each comprising a positive component signal (1, 3) and a negative component signal (2, 4). A respective one of two transistors connected in parallel is driven by a positive component signal (1, 3) and a negative component signal (2, 4) in such a way that a positive half-wave causes the relevant transistor (5-8) to conduct and the relevant transistor (5-8) blocks in a negative half-wave. The rectified input signal (1, 2) or delayed signal (3, 4) is obtained from the two component currents flowing through the pairs of transistors (5-8) connected in parallel when the currents are added. The rectified input signal (1, 2) and delayed signal (3, 4), which are in the form of current signals, can be passed through two resistors (9, 10) to enable corresponding voltage signals to be generated across the latter and the output signal (11) to be picked off from the two resistors (9, 10).
摘要:
According to one embodiment a semiconductor device is provided. The device includes a first compensator to generate a first compensated signal and a first limiter to control operation of the first compensator. Furthermore, a second compensator to generate a second compensated signal and a second limiter to control operation of the second compensator is provided. An output device is adapted to receive the first compensated signal and the second compensated signal to drive an output.
摘要:
An arrangement for generating a transmission clock signal and a reception clock signal is proposed in which only a single voltage-controlled oscillator is used, the reception clock signal being generated by phase-adjusting means whereas the transmission clock signal is generated directly by the voltage-controlled oscillator. Cross-talk between a plurality of voltage-controlled oscillators can be prevented in this way. Also, various measures are proposed for optimizing a circuit of this kind.
摘要:
The present invention is a converter stage for converting a differential logic input signal and a corresponding common mode differential logic signal each having a first single-ended logic signal and a complementary second single-ended logic signal into a single-ended logic output signal. The converter stage comprises a first and a second differential stage each having a first and a second MOS transistor and a first and second current source for the differential stages. According to the invention the current sources are controlled by the voltage level which is centered between the mid-potentials of the common mode level differential logic signal and the mid-potential of the differential logic input signal.