公开(公告)号：US07043596B2

公开(公告)日：2006-05-09

申请号：US10113060

申请日：2002-03-29

申请人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Michael W. Parkin ,  Oyekunle A. Olukotun ,  Derek E. Pappas ,  Jeffrey M. Broughton ,  David R. Emberson ,  David S. Allison ,  Ashley N. Saulsbury ,  Earl T. Cohen ,  Nyles I. Nettleton ,  James B. Burr ,  Liang T. Chen

发明人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Michael W. Parkin ,  Oyekunle A. Olukotun ,  Derek E. Pappas ,  Jeffrey M. Broughton ,  David R. Emberson ,  David S. Allison ,  Ashley N. Saulsbury ,  Earl T. Cohen ,  Nyles I. Nettleton ,  James B. Burr ,  Liang T. Chen

IPC分类号： G06F13/00 ,  H04L12/28

CPC分类号： G06F17/5022 ,  G06F15/8023 ,  H04L49/10 ,  H04L49/101

摘要： A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first sub-cluster crossbar is associated with a first one of the plurality of statically scheduled routing processors where the first sub-cluster crossbar is connected to a first plurality of execution processors. A second sub-cluster crossbar is associated with a second one of the plurality of statically scheduled routing processors where the second sub-cluster crossbar is connected to a second plurality of execution processors.

公开(公告)号：US06957318B2

公开(公告)日：2005-10-18

申请号：US10112118

申请日：2002-03-28

申请人： David R. Emberson ,  Jeffrey M. Broughton ,  James B. Burr ,  Derek E. Pappas

发明人： David R. Emberson ,  Jeffrey M. Broughton ,  James B. Burr ,  Derek E. Pappas

IPC分类号： G06F17/50 ,  G06F3/00

CPC分类号： G06F17/5022

摘要： A method for controlling a processor array by a host computer involves creating a graph of a plurality of nodes using a data connection component, configuring a broadcast tree from a spanning tree of the graph, propagating a first command from the host computer to a member of the processor array using the broadcast tree, configuring a reply tree from a spanning tree of the graph, transmitting a response from the member of the processor array to the host computer using the reply tree, and configuring the data connection component to send at least one message selected from the first command and the response on at least one run mode communication path.

摘要翻译： 用于由主计算机控制处理器阵列的方法包括使用数据连接组件创建多个节点的图形，从图表的生成树配置广播树，将第一命令从主计算机传播到主机的成员 使用所述广播树的所述处理器阵列，从所述图的生成树配置回复树，使用所述答复树将所述处理器阵列的成员的响应发送到所述主计算机，以及配置所述数据连接组件以发送至少一个 从第一命令中选择的消息和至少一个运行模式通信路径上的响应。

公开(公告)号：US07036114B2

公开(公告)日：2006-04-25

申请号：US10113005

申请日：2002-03-29

申请人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Derek E. Pappas ,  Oyekunle A. Olukotun ,  Jeffrey M. Broughton ,  David R. Emberson ,  William kwei-cheung Lam ,  Liang T. Chen ,  Ihao Chen ,  Earl T. Cohen ,  Michael W. Parkin

发明人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Derek E. Pappas ,  Oyekunle A. Olukotun ,  Jeffrey M. Broughton ,  David R. Emberson ,  William kwei-cheung Lam ,  Liang T. Chen ,  Ihao Chen ,  Earl T. Cohen ,  Michael W. Parkin

IPC分类号： G06F9/45

CPC分类号： G06F17/5022 ,  G06F2217/68

摘要： A computer system for cycle-based computation includes a processor array, a translation component adapted to translate a cycle-based design, a host computer operatively connected to the processor array and to the translation component, a data connection component interconnecting a plurality of members of the processor array using static routing, a synchronization component enabling known timing relationships among the plurality of members of the processor array, a host service request component adapted to send a host service request from a member of the processor array to the host computer, and an access component adapted to access a portion of a state of the processor array and a portion of a state of the data connection.

公开(公告)号：US07080365B2

公开(公告)日：2006-07-18

申请号：US10113582

申请日：2002-03-29

申请人： Jeffrey M. Broughton ,  Liang T. Chen ,  William kwei-cheung Lam ,  Derek E. Pappas ,  Ihao Chen ,  Thomas M. McWilliams ,  Ankur Narang ,  Jeffrey B. Rubin ,  Earl T. Cohen ,  Michael W. Parkin ,  Ashley N. Saulsbury ,  Michael S. Ball

发明人： Jeffrey M. Broughton ,  Liang T. Chen ,  William kwei-cheung Lam ,  Derek E. Pappas ,  Ihao Chen ,  Thomas M. McWilliams ,  Ankur Narang ,  Jeffrey B. Rubin ,  Earl T. Cohen ,  Michael W. Parkin ,  Ashley N. Saulsbury ,  Michael S. Ball

IPC分类号： G06F9/45

CPC分类号： G06F17/5022 ,  G06F8/427 ,  G06F8/443 ,  G06F8/445 ,  G06F8/45

摘要： A method for compiling a cycle-based design involves generating a parsed cycle-based design from the cycle-based design, elaborating the parsed cycle-based design to an annotated syntax tree, translating the annotated syntax tree to an intermediate form, and converting the intermediate form to an executable form.

公开(公告)号：US06912640B2

公开(公告)日：2005-06-28

申请号：US10389270

申请日：2003-03-14

申请人： David S. Allison ,  Deepankar Bairagi ,  Jeffrey M. Broughton

发明人： David S. Allison ,  Deepankar Bairagi ,  Jeffrey M. Broughton

IPC分类号： G06F9/44 ,  G06F9/45 ,  G06F12/00

CPC分类号： G06F8/45

摘要： A method for executing an instruction stream includes partitioning the instruction stream using a partition point to obtain a first partition of the instruction stream and a second partition of the instruction stream, configuring the first partition and the second partition to fit separate e-caches, analyzing the first partition and the second partition to generate a runtime execution facility and a data transfer facility, and executing the first partition and the second partition on separate processors using the runtime execution facility and the data transfer facility.

摘要翻译： 一种用于执行指令流的方法，包括使用分割点对指令流进行分区以获得指令流的第一分区和指令流的第二分区，配置第一分区和第二分区以配合单独的电子缓存，分析 所述第一分区和所述第二分区用于生成运行时执行设备和数据传送设备，以及使用所述运行时执行设施和所述数据传送设施在分开的处理器上执行所述第一分区和所述第二分区。