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1.发明授权Method and apparatus for performing unaligned little endian and big endian data accesses in a processing system 失效用于在处理系统中执行未对齐的小端和大端数据访问的方法和装置
公开(公告)号：US5519842A
公开(公告)日：1996-05-21
申请号：US23560
申请日：1993-02-26
申请人： Deif N. Atallah , Yan Xu
发明人： Deif N. Atallah , Yan Xu
摘要： A system which is able to perform unaligned big endian and little endian accesses to memory with little or no added overhead to the system. In the preferred embodiment, the processor operates in little endian data format. The memory, however, can store data in big endian and little endian format in different memory regions. If an unaligned access is to be performed, the access requires translation to corresponding aligned memory accesses. However, if the processor operates in little endian format and accesses are to memory which store according big endian format, special code is required to perform proper translation of accesses. When the address generation unit of the processor detects an unaligned memory access, an unaligned signal is set which causes a microassist to initiate a microflow to execute microcode which performs the necessary translations for unaligned accesses. The address generation unit also sends the address to be access to the memory region table which maintains information regarding each memory region, including whether the region is big endian or little endian. The state bit indicative of the data format is logically combined with the unaligned access signal to generate an output which sets the state of the flag. The flag is then accessed by the microcode to determine the translation routine to process the memory access.
摘要翻译： 能够对系统执行不重要的大端和小端访问的系统，很少或没有额外的开销。 在优选实施例中，处理器以小的数据格式进行操作。 然而，存储器可以在不同的存储器区域中存储大端和小端格式的数据。 如果要执行未对齐的访问，则访问需要转换为对应的对齐的存储器访问。 然而，如果处理器以小的端格式操作，并且访问是根据大端格式存储的存储器，则需要特殊代码来执行适当的访问转换。 当处理器的地址生成单元检测到未对齐的存储器访问时，设置未对齐的信号，其使微辅助器发起微流以执行对未对齐访问执行必要的转换的微代码。 地址生成单元还将要访问的地址发送到维护关于每个存储区域的信息的存储器区域表，包括该区域是大端还是小端。 指示数据格式的状态位与未对准的访问信号逻辑组合以产生设置标志状态的输出。 然后，该标记由微码访问以确定翻译程序来处理存储器访问。
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公开(公告)号：US07640481B2
公开(公告)日：2009-12-29
申请号：US11389340
申请日：2006-03-23
CPC分类号： A61B1/04 , A61B1/041 , A61B5/0031 , A61B5/036 , A61B5/042 , A61B5/14539 , A61N1/36007 , G06F11/108
摘要： A method according to one embodiment may include operating an integrated circuit in a selected mode of operation. The integrated circuit may include first circuitry and second circuitry. The first circuitry may be capable of performing at least one operation including, at least in part, generating check data based at least in part upon other data, regenerating the other data based at least in part upon the check data, and/or determining locations of the check data and the other data in storage. The second circuitry may be capable of controlling, at least in part, at least one interface to transmit from and/or receive at the integrated circuit the check data and/or the other data. Depending at least in part upon the selected mode of operation, the first circuitry may be either enabled to perform or disabled from performing the at least one operation.
摘要翻译： 根据一个实施例的方法可以包括以所选择的操作模式操作集成电路。 集成电路可以包括第一电路和第二电路。 第一电路可以能够执行至少一个操作，至少部分地至少部分地基于其他数据生成检查数据，至少部分地基于检查数据重新生成其他数据，和/或确定位置 的检查数据和存储中的其他数据。 第二电路可能能够至少部分地控制至少一个接口，以在集成电路中从和/或接收检查数据和/或其他数据。 至少部分地基于所选择的操作模式，可以使第一电路能够执行或禁止执行至少一个操作。
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公开(公告)号：US07421517B2
公开(公告)日：2008-09-02
申请号：US11036418
申请日：2005-01-14
IPC分类号： G06F3/00
CPC分类号： G06F13/385
摘要： A method according to one embodiment may include operating an integrated circuit in a selected mode of operation. The integrated circuit may include processor circuitry and interface circuitry. The processor circuitry may include a plurality of processor cores. The interface circuitry may be capable of communicating in accordance a plurality of different protocols. At least one of the processor cores may be capable of issuing a command to the interface circuitry to communicate in accordance with at least one of the plurality of different protocols that corresponds to the selected mode of operation of the integrated circuit.
摘要翻译： 根据一个实施例的方法可以包括以所选择的操作模式操作集成电路。 集成电路可以包括处理器电路和接口电路。 处理器电路可以包括多个处理器核。 接口电路可以能够根据多种不同的协议进行通信。 处理器核心中的至少一个可以能够根据与集成电路的所选择的操作模式对应的多个不同协议中的至少一个向接口电路发出命令。
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公开(公告)号：US07552242B2
公开(公告)日：2009-06-23
申请号：US11003319
申请日：2004-12-03
申请人： Eric J. DeHaemer , Deif N. Atallah
发明人： Eric J. DeHaemer , Deif N. Atallah
CPC分类号： G06F13/4022
摘要： An apparatus according to one embodiment may include an integrated circuit. The integrated circuit may include a processor and a switch. The switch may comprise one or more ports capable of being coupled to one or more segments external to the switch. The processor may be capable of issuing to the switch one or more commands indicating, at least in part, one or more protocols via which the one or more ports are to communicate and/or one or more forwarding characteristics of the switch. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
摘要翻译： 根据一个实施例的装置可以包括集成电路。 集成电路可以包括处理器和开关。 开关可以包括能够耦合到开关外部的一个或多个段的一个或多个端口。 处理器可以能够向交换机发出一个或多个命令，至少部分地指示一个或多个端口要通信的一个或多个协议和/或交换机的一个或多个转发特性。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。
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公开(公告)号：US07596652B2
公开(公告)日：2009-09-29
申请号：US10846459
申请日：2004-05-14
IPC分类号： G06F13/36
CPC分类号： G06F13/4027
摘要： An apparatus according to one embodiment may include an integrated circuit. The integrated circuit may include a processor, a bridge, and circuitry capable of coupling the bridge and the processor to a first bus and to a second bus. The first bus may be compatible with a first bus protocol, the second bus may be compatible with a second bus protocol, and the first and second bus protocols may be different from each other. The bridge may be capable of, in response at least in part to a request from the processor, preventing a command received at the bridge via the first bus from being forwarded from the bridge to the second bus. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
摘要翻译： 根据一个实施例的装置可以包括集成电路。 集成电路可以包括处理器，桥接器和能够将桥接器和处理器耦合到第一总线和第二总线的电路。 第一总线可以与第一总线协议兼容，第二总线可以与第二总线协议兼容，并且第一和第二总线协议可以彼此不同。 至少部分地响应于来自处理器的请求，桥可以能够阻止经由第一总线在桥接处接收的命令从桥接器转发到第二总线。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。
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公开(公告)号：US07334075B2
公开(公告)日：2008-02-19
申请号：US11460592
申请日：2006-07-27
CPC分类号： G06F13/4045
摘要： Provided are a method, system, and program for processing a transmission from a first device to a second device. An identification transmission is received including an interface address from the first device. A determination is made as to whether the identification transmission indicates a recognized vendor identifier. An interface address of a third device is returned to the first device in response to determining that the identification transmission includes one recognized vendor identifier, wherein the third device relays transmissions between the first and second devices.
摘要翻译： 提供了一种用于处理从第一设备到第二设备的传输的方法，系统和程序。 接收包括来自第一设备的接口地址的识别传输。 确定识别传输是否指示识别的供应商标识符。 响应于确定识别传输包括一个公认的供应商标识符，第三设备的接口地址被返回到第一设备，其中第三设备中继第一和第二设备之间的传输。
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公开(公告)号：US07543085B2
公开(公告)日：2009-06-02
申请号：US10301027
申请日：2002-11-20
IPC分类号： G06F3/00
CPC分类号： G06F13/385
摘要： A method according to one embodiment may include operating an integrated circuit in a selected mode of operation. The integrated circuit may include processor circuitry and interface circuitry. The processor circuitry may include a plurality of processor cores. The interface circuitry may be capable of communicating in accordance a plurality of different protocols. At least one of the processor cores may be capable of issuing a command to the interface circuitry to communicate in accordance with at least one of the plurality of different protocols that corresponds to the selected mode of operation of the integrated circuit.
摘要翻译： 根据一个实施例的方法可以包括以所选择的操作模式操作集成电路。 集成电路可以包括处理器电路和接口电路。 处理器电路可以包括多个处理器核。 接口电路可以能够根据多种不同的协议进行通信。 处理器核心中的至少一个可以能够根据与集成电路的所选择的操作模式对应的多个不同协议中的至少一个向接口电路发出命令。
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公开(公告)号：US07412540B2
公开(公告)日：2008-08-12
申请号：US10815269
申请日：2004-03-31
申请人： Pak-Lung Seto , Deif N. Atallah
发明人： Pak-Lung Seto , Deif N. Atallah
IPC分类号： G06F15/16
CPC分类号： H04L67/1097
摘要： A method according to one embodiment may include transmitting a frame from a transmitting device to a receiving device via a communication network of a data storage system, enabling an encoding operation of the transmitting device to encode decoded data into encoded data and transmitting the encoded data in the frame via the communication network if the receiving device has a decoding operation capable of decoding the encoded data into the decoded data, and disabling the encoding operation and transmitting the decoded data in the frame via the communication network to the receiving device if the receiving device does not have the decoding operation capable of decoding the encoded data into the decoded data. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
摘要翻译： 根据一个实施例的方法可以包括经由数据存储系统的通信网络将帧从发送设备发送到接收设备，使得发送设备的编码操作能够将解码的数据编码为编码数据并将编码数据发送到 如果接收设备具有能够将编码数据解码为解码数据的解码操作，则经由通信网络的帧，并且如果接收设备，则禁止编码操作并且经由通信网络将经解码的数据经由通信网络发送到接收设备 不具有能够将编码数据解码成解码数据的解码操作。 当然，在不偏离本实施例的情况下，可以进行许多替代，变化和修改。
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公开(公告)号：US07376147B2
公开(公告)日：2008-05-20
申请号：US10742029
申请日：2003-12-18
申请人： Pak-Lung Seto , Deif N. Atallah
发明人： Pak-Lung Seto , Deif N. Atallah
CPC分类号： H04L29/06 , H04L67/1097 , H04L69/18 , H04L69/32
摘要： Provided are a method, adaptor, system, and program for receiving a transmission at one of multiple connections. Information is maintained on storage interconnect architectures and transmission characteristics, wherein the storage interconnect architectures have different transmission characteristics. At least one transmission characteristic of the received transmission is determined and a determination is made from the information of the storage interconnect architecture associated with the determined transmission characteristic. The information on the determined storage interconnect architecture is used to process the transmission and determine a transport layer for the received transmission, wherein there is one transport layer for each supported transport protocol. The transmission is forwarded to the determined transport layer.
摘要翻译： 提供了一种用于在多个连接之一接收传输的方法，适配器，系统和程序。 在存储互连架构和传输特性上维持信息，其中存储互连架构具有不同的传输特性。 确定接收到的传输的至少一个传输特性，并根据与确定的传输特性相关联的存储互连架构的信息进行确定。 关于确定的存储互连体系结构的信息用于处理传输并确定用于所接收的传输的传输层，其中每个支持的传输协议具有一个传输层。 传输被转发到确定的传输层。
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公开(公告)号：US07206989B2
公开(公告)日：2007-04-17
申请号：US10301028
申请日：2002-11-20
CPC分类号： A61B1/04 , A61B1/041 , A61B5/0031 , A61B5/036 , A61B5/042 , A61B5/14539 , A61N1/36007 , G06F11/108
摘要： A method according to one embodiment may include operating an integrated circuit in a selected mode of operation. The integrated circuit may include first circuitry and second circuitry. The first circuitry may be capable of performing at least one operation including, at least in part, generating check data based at least in part upon other data, regenerating the other data based at least in part upon the check data, and/or determining locations of the check data and the other data in storage. The second circuitry may be capable of controlling, at least in part, at least one interface to transmit from and/or receive at the integrated circuit the check data and/or the other data. Depending at least in part upon the selected mode of operation, the first circuitry may be either enabled to perform or disabled from performing the at least one operation.
摘要翻译： 根据一个实施例的方法可以包括以所选择的操作模式操作集成电路。 集成电路可以包括第一电路和第二电路。 第一电路可以能够执行至少一个操作，至少部分地至少部分地基于其他数据生成检查数据，至少部分地基于检查数据重新生成其他数据，和/或确定位置 的检查数据和存储中的其他数据。 第二电路可能能够至少部分地控制至少一个接口，以在集成电路中从和/或接收检查数据和/或其他数据。 至少部分地基于所选择的操作模式，可以使第一电路能够执行或禁止执行至少一个操作。
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