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公开(公告)号：US08130889B2
公开(公告)日：2012-03-06
申请号：US11098130
申请日：2005-04-04
IPC分类号： H04L7/02
CPC分类号： H04L7/0338
摘要： A novel receive timing manager is presented. The preferred embodiment of the present invention comprises an edge detection logic to detect the data transition points, a plurality of data flip-flops for storing data at different sample points, and a multiplexer to select the ideal sample point based on the transition points found. A sample window is made with multiple samples. The sample window size can be designed smaller or greater than the system clock period based on the data transfer speed and accuracy requirement.
摘要翻译： 介绍了一种新颖的接收时序管理器。 本发明的优选实施例包括用于检测数据转换点的边缘检测逻辑，用于在不同采样点存储数据的多个数据触发器，以及多路复用器，用于基于找到的转换点来选择理想采样点。 样品窗口由多个样品制成。 基于数据传输速度和精度要求，样本窗口大小可以设计为比系统时钟周期更小或更大。
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公开(公告)号：US08983012B2
公开(公告)日：2015-03-17
申请号：US13358183
申请日：2012-01-25
CPC分类号： H04L7/0338
摘要： A novel receive timing manager is presented. The preferred embodiment of the present invention comprises an edge detection logic to detect the data transition points, a plurality of data flip-flops for storing data at different sample points, and a multiplexer to select the ideal sample point based on the transition points found. A sample window is made with multiple samples. The sample window size can be designed smaller or greater than the system clock period based on the data transfer speed and accuracy requirement.
摘要翻译： 介绍了一种新颖的接收时序管理器。 本发明的优选实施例包括用于检测数据转换点的边缘检测逻辑，用于在不同采样点存储数据的多个数据触发器，以及多路复用器，用于基于找到的转换点来选择理想采样点。 样品窗口由多个样品制成。 基于数据传输速度和精度要求，样本窗口大小可以设计为比系统时钟周期更小或更大。
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公开(公告)号：US20120121051A1
公开(公告)日：2012-05-17
申请号：US13358183
申请日：2012-01-25
CPC分类号： H04L7/0338
摘要： A novel receive timing manager is presented. The preferred embodiment of the present invention comprises an edge detection logic to detect the data transition points, a plurality of data flip-flops for storing data at different sample points, and a multiplexer to select the ideal sample point based on the transition points found. A sample window is made with multiple samples. The sample window size can be designed smaller or greater than the system clock period based on the data transfer speed and accuracy requirement.
摘要翻译： 介绍了一种新颖的接收时序管理器。 本发明的优选实施例包括用于检测数据转换点的边缘检测逻辑，用于在不同采样点存储数据的多个数据触发器，以及多路复用器，用于基于找到的转换点来选择理想采样点。 样品窗口用多个样品制成。 基于数据传输速度和精度要求，样本窗口大小可以设计为比系统时钟周期更小或更大。
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4.发明授权System and method for communications link calibration using a training packet 失效使用训练数据包进行通信链路校准的系统和方法公开(公告)号：US06578153B1
公开(公告)日：2003-06-10
申请号：US09527323
申请日：2000-03-16
IPC分类号： H04L700
CPC分类号： H04L1/00
摘要： In one aspect, the present invention provides a method of communicating across a serial line 26. In this method, n parallel streams of data 30 are to be received at a destination 20. In a first embodiment, the n parallel streams of data 30 characterized in that one of streams of data includes a unique characteristic that can be used to distinguish that one from each of the other streams of data. In a second embodiment, each of the n streams of data 30 are in a particular pattern that includes a detectable characteristic. At the destination 20, the unique characteristic and/or detectable characteristic can be detected to correct space and/or time errors in the streams of data. For example, the destination 20 might be a receiver that includes a serial-to-parallel converter 28 and calibration circuitry 34.
摘要翻译： 在一个方面，本发明提供了一种在串行线26上进行通信的方法。在该方法中，将在目的地20处接收n个并行数据流30。在第一实施例中，数据30的n个并行流的特征在于 数据流中的一个包括可以用于将其与每个其他数据流区分开的唯一特性。 在第二实施例中，n个数据流30中的每一个是包括可检测特性的特定模式。 在目的地20，可以检测独特的特征和/或可检测的特性以校正数据流中的空间和/或时间误差。 例如，目的地20可以是包括串行到并行转换器28和校准电路34的接收机。
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