Process for manufacturing metal-semiconductor field-effect transistors
    10.
    发明授权
    Process for manufacturing metal-semiconductor field-effect transistors 失效
    制造金属半导体场效应晶体管的工艺

    公开(公告)号:US4731339A

    公开(公告)日:1988-03-15

    申请号:US899574

    申请日:1986-08-25

    IPC分类号: H01L21/338 B44C1/22

    CPC分类号: H01L29/66871

    摘要: A single-level photoresist process is used to make metal-semiconductor field-effect transistors (MESFETs) having more uniform threshold voltages. An N.sup.- layer is formed in a semi-insulating semiconductor, followed by formation of a dummy gate using a single-level photoresist process. Using the dummy gate as a mask, ions are implanted to form an N.sup.+ region. The length of the dummy gate is then reduced by plasma etching. A dielectric is deposited over the N.sup.+ region, the N.sup.+ /N.sup.- interface, and the exposed portion of the N.sup.- layer. The dummy gate is lifted off to define a self-aligned, submicron gate opening. The gate opening on the N.sup.- layer is reactive ion etched to obtain the desired threshold voltage, and covered with a Schottky gate metal deposit.

    摘要翻译: 使用单级光刻胶工艺来制造具有更均匀阈值电压的金属半导体场效应晶体管(MESFET)。 在半绝缘半导体中形成N-层,然后使用单层光致抗蚀剂工艺形成虚拟栅极。 使用伪栅极作为掩模,注入离子以形成N +区域。 然后通过等离子体蚀刻减少虚拟栅极的长度。 电介质沉积在N +区域上,N + / N-界面和N层的暴露部分。 虚拟门被提起以限定自对准的亚微米门开口。 N-层上的栅极开口被反应离子蚀刻以获得所需的阈值电压,并用肖特基栅极金属沉积物覆盖。