Partial reconfiguration of a programmable logic device using an on-chip processor
    1.
    发明授权
    Partial reconfiguration of a programmable logic device using an on-chip processor 有权
    使用片上处理器对可编程逻辑器件进行部分重新配置

    公开(公告)号:US06907595B2

    公开(公告)日:2005-06-14

    申请号:US10319051

    申请日:2002-12-13

    IPC分类号: G06F15/78 G06F17/50

    CPC分类号: G06F15/7867

    摘要: A programmable logic device, such as a field programmable gate array, is partially reconfigured using a read-modify-write scheme that is controlled by a processor. The partial reconfiguration includes (1) loading a base set of configuration data values into a configuration memory array of the programmable logic device, thereby configuring the programmable logic device; (2) reading a first frame of configuration data values from the configuration memory array; (3) modifying a subset of the configuration data values in the first frame of configuration data values, thereby creating a first modified frame of configuration data values; and (4) overwriting the first frame of configuration data values in the configuration memory array with the first modified frame of configuration data values, thereby partially reconfiguring the programmable logic device. The steps of reading, modifying and overwriting are performed under the control of a processor.

    摘要翻译: 使用由处理器控制的读 - 修改 - 写入方案来部分地重新配置可编程逻辑器件,例如现场可编程门阵列。 部分重新配置包括(1)将一组配置数据值加载到可编程逻辑器件的配置存储器阵列中,从而配置可编程逻辑器件; (2)从配置存储器阵列读取配置数据值的第一帧; (3)修改配置数据值的第一帧中的配置数据值的子集,由此创建配置数据值的第一修改帧; 和(4)用配置数据值的第一修改帧重写配置存储器阵列中的配置数据值的第一帧,从而部分地重新配置可编程逻辑器件。 读取,修改和重写的步骤在处理器的控制下执行。