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    Methods for instruction trace decomposition
    1.
    发明授权
    Methods for instruction trace decomposition 有权
    指令跟踪分解方法

    公开(公告)号：US08095914B1

    公开(公告)日：2012-01-10

    申请号：US11696157

    申请日：2007-04-03

    申请人： Deshanand Singh ,  Stephen D. Brown

    发明人： Deshanand Singh ,  Stephen D. Brown

    IPC分类号： G06F9/44 ,  G06F11/00

    CPC分类号： G06F11/3636

    摘要： An instruction trace is segmented into a number of contiguous instruction segments, such that each boundary between adjacent instruction segments is defined by a branch instruction. A segment identifier is assigned to each instruction segment, such that each instruction segment having identical content is assigned a same segment identifier. Using the assigned segment identifiers, the instruction trace is translated into a sequence of segment identifiers. The sequence of segment identifiers is then iteratively consolidated into a prime form that does not include a repetition of a heterogeneous pair of consecutive segment identifiers. The prime form of the sequence of segment identifiers is then rendered in a graphical format.

    摘要翻译： 指令轨迹被分割成多个连续的指令段，使得相邻指令段之间的每个边界由分支指令定义。 分段标识符被分配给每个指令段，使得具有相同内容的每个指令段被分配相同的段标识符。 使用分配的段标识符，将指令轨迹转换成段标识符序列。 然后将段标识符的序列迭代地合并成不包括异步对的连续段标识符的重复的主要形式。 然后以图形格式呈现段标识符序列的主要形式。

    OpenCL compilation
    8.
    发明授权
    OpenCL compilation 有权
    OpenCL编译

    公开(公告)号：US09134981B2

    公开(公告)日：2015-09-15

    申请号：US13531353

    申请日：2012-06-22

    申请人： Doris Tzu Lang Chen ,  Deshanand Singh

    发明人： Doris Tzu Lang Chen ,  Deshanand Singh

    IPC分类号： G06F9/44 ,  G06F9/45 ,  G06F17/50

    CPC分类号： G06F8/48 ,  G06F17/5054

    摘要： Systems and methods for increasing speed and reducing processing power of a compile process of programmable logic of an integrated circuit (IC) are provided. For example, in one embodiment, a method includes obtaining a high level program, comprising computer-readable instructions for implementation on programmable logic of an integrated circuit (IC); translating the high level program into low level code representative of functional components needed to execute functionalities of the high level program; generating a host program comprising computer-readable instructions for implementing the low level code based upon the high level program; obtaining modifications to the high level program; determining whether the modifications can be implemented by a new host program utilizing the low level code; and generating the new host program to implement the modifications, when the modifications can be implemented by the new host program utilizing the low level code.

    摘要翻译： 提供了用于提高集成电路（IC）的可编程逻辑的编译过程的速度和降低处理能力的系统和方法。 例如，在一个实施例中，一种方法包括获得高级程序，包括用于在集成电路（IC）的可编程逻辑上实现的计算机可读指令; 将高级程序转换为代表执行高级程序的功能所需的功能组件的低级代码; 生成包括用于基于所述高级程序实现所述低级代码的计算机可读指令的主机程序; 获得对高级程序的修改; 确定所述修改是否可以通过利用所述低级代码的新的主机程序来实现; 并且当通过新的主机程序利用低级代码实现修改时，生成新的主机程序来实施修改。

    Configuring a programmable device using high-level language
    9.
    发明授权
    Configuring a programmable device using high-level language 有权
    使用高级语言配置可编程设备

    公开(公告)号：US08959469B2

    公开(公告)日：2015-02-17

    申请号：US13369829

    申请日：2012-02-09

    申请人： Doris Tzu-Lang Chen ,  Deshanand Singh

    发明人： Doris Tzu-Lang Chen ,  Deshanand Singh

    IPC分类号： G06F17/50 ,  H03K19/177

    CPC分类号： G06F17/505 ,  G06F17/5054 ,  G06F17/5077 ,  G06F2217/66 ,  G06F2217/78 ,  H03K19/17736 ,  H04L41/0806 ,  H04L49/35

    摘要： A method of preparing a programmable integrated circuit device for configuration using a high-level language includes compiling a plurality of virtual programmable devices from descriptions in said high-level language. The compiling includes compiling configurations of configurable routing resources from programmable resources of said programmable integrated circuit device, and compiling configurations of a plurality of complex function blocks from programmable resources of said programmable integrated circuit device. A machine-readable data storage medium may be encoded with a library of such compiled configurations. A virtual programmable device may include a stall signal network and routing switches of the virtual programmable device may include stall signal inputs and outputs.

    摘要翻译： 准备用于使用高级语言配置的可编程集成电路器件的方法包括从所述高级语言的描述中编译多个虚拟可编程器件。 该编译包括从所述可编程集成电路装置的可编程资源编译配置路由资源的配置，以及从所述可编程集成电路装置的可编程资源编译多个复杂功能块的配置。 机器可读数据存储介质可以用这种编译配置的库进行编码。 虚拟可编程设备可以包括失速信号网络，并且虚拟可编程设备的路由交换机可以包括失速信号输入和输出。