High-frequency semiconductor wafer processing method using a negative
self-bias
    1.
    发明授权
    High-frequency semiconductor wafer processing method using a negative self-bias 失效
    高频半导体晶片加工方法采用负自偏

    公开(公告)号:US5223457A

    公开(公告)日:1993-06-29

    申请号:US774127

    申请日:1991-10-11

    IPC分类号: H01J37/32 H05H1/46

    摘要: A plasma process apparatus capable of operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.

    摘要翻译: 能够显着地高于13.56MHz的等离子体处理装置可以产生被动电极的自偏压降低,从而能够实现不损害在高速和高密度集成电路中日益普及的薄层的较软工艺。 使用非常规匹配网络来消除这些较高频率处的反射。 匹配网络组件的自动控制使得可以调整射频频率以点燃等离子体,然后以选定的可变频率工作,以最小化处理时间,而不会对集成电路造成显着损害。