High-frequency semiconductor wafer processing method using a negative
self-bias
    1.
    发明授权
    High-frequency semiconductor wafer processing method using a negative self-bias 失效
    高频半导体晶片加工方法采用负自偏

    公开(公告)号:US5223457A

    公开(公告)日:1993-06-29

    申请号:US774127

    申请日:1991-10-11

    IPC分类号: H01J37/32 H05H1/46

    摘要: A plasma process apparatus capable of operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.

    摘要翻译: 能够显着地高于13.56MHz的等离子体处理装置可以产生被动电极的自偏压降低,从而能够实现不损害在高速和高密度集成电路中日益普及的薄层的较软工艺。 使用非常规匹配网络来消除这些较高频率处的反射。 匹配网络组件的自动控制使得可以调整射频频率以点燃等离子体,然后以选定的可变频率工作,以最小化处理时间,而不会对集成电路造成显着损害。

    High frequency semiconductor wafer processing apparatus and method
    2.
    发明授权
    High frequency semiconductor wafer processing apparatus and method 失效
    高频半导体晶片加工设备及方法

    公开(公告)号:US5849136A

    公开(公告)日:1998-12-15

    申请号:US754833

    申请日:1996-11-22

    IPC分类号: H01J37/32 H05H1/00

    CPC分类号: H01J37/32082 H01J37/32183

    摘要: A plasma process apparatus capable of operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.

    摘要翻译: 能够显着地高于13.56MHz的等离子体处理装置可以产生被动电极的自偏置电压降低,以使得不会损害在高速和高密度集成电路中越来越普遍的薄层的较软工艺。 使用非常规匹配网络来消除这些较高频率处的反射。 匹配网络组件的自动控制使得可以调整射频频率以点燃等离子体,然后以选定的可变频率工作,以最小化处理时间,而不会对集成电路造成显着损害。

    High-frequency semiconductor wafer processing apparatus and method
    3.
    发明授权
    High-frequency semiconductor wafer processing apparatus and method 失效
    高频半导体晶片加工装置及方法

    公开(公告)号:US5618382A

    公开(公告)日:1997-04-08

    申请号:US83750

    申请日:1993-06-25

    IPC分类号: H01J37/32 H05H1/46 H05H1/00

    摘要: A plasma process apparatus capacitor operation significantly above 13.56 MHz can produce reduced self-bias voltage of the powered electrode to enable softer processes that do not damage thin layers that are increasingly becoming common in high speed and high density integrated circuits. A nonconventional match network is used to enable elimination of reflections at these higher frequencies. Automatic control of match network components enables the rf frequency to be adjusted to ignite the plasma and then to operate at a variable frequency selected to minimize process time without significant damage to the integrated circuit.

    摘要翻译: 等离子体处理装置的电容器操作明显高于13.56MHz可以产生被动电极的自偏压降低,以使得不会损坏在高速和高密度集成电路中越来越普遍的薄层的较软工艺。 使用非常规匹配网络来消除这些较高频率处的反射。 匹配网络组件的自动控制使得可以调整射频频率以点燃等离子体,然后以选定的可变频率工作,以最小化处理时间,而不会对集成电路造成显着损害。

    Symmetric tunable inductively coupled HDP-CVD reactor
    4.
    发明授权
    Symmetric tunable inductively coupled HDP-CVD reactor 失效
    对称可调谐电感耦合HDP-CVD反应堆

    公开(公告)号:US06170428B2

    公开(公告)日:2001-01-09

    申请号:US08679927

    申请日:1996-07-15

    IPC分类号: C23C1600

    摘要: The present invention provides an HDP-CVD tool using simultaneous deposition and sputtering of doped and undoped silicon dioxide capable of excellent gap fill and blanket film deposition on wafers having sub 0.5 micron feature sizes having aspect ratios higher than 1.2:1. The system of the present invention includes: a dual RF zone inductively coupled plasma source configuration capable of producing radially tunable ion currents across the wafer; a dual zone gas distribution system to provide uniform deposition properties across the wafer surface; temperature controlled surfaces to improve film adhesion and to control extraneous particle generation; a symmetrically shaped turbomolecular pumped chamber body to eliminate gas flow or plasma ground azimuthal asymmetries; a dual helium cooling zone electrostatic chuck to provide and maintain uniform wafer temperature during processing; an all ceramic/aluminum alloy chamber construction to eliminate chamber consumables; and a remote fluorine based plasma chamber cleaning system for high chamber cleaning rate without chuck cover plates.

    摘要翻译: 本发明提供一种使用同时沉积和溅射掺杂和未掺杂的二氧化硅的HDP-CVD工具,其能够在具有高于1.2:1的纵横比的0.5微米特征尺寸的晶片上具有优异的间隙填充和覆盖膜沉积。 本发明的系统包括:双RF区电感耦合等离子体源配置,其能够跨晶片产生径向可调离子电流; 双区气体分配系统,以在晶片表面上提供均匀的沉积性能; 温度控制表面,以改善膜的附着力并控制外来颗粒的产生; 一个对称成形的涡轮分子抽吸室体,以消除气体流动或等离子体地面方位不对称性; 双氦冷却区静电卡盘,在加工过程中提供并保持晶圆温度均匀; 全陶瓷/铝合金室结构,可消除室内耗材; 以及远程氟基等离子体室清洁系统,用于无卡盘盖板的高室清洁率。

    Method for fabricating waveguides
    6.
    发明授权
    Method for fabricating waveguides 失效
    制造波导的方法

    公开(公告)号:US07871469B2

    公开(公告)日:2011-01-18

    申请号:US10867591

    申请日:2004-06-14

    IPC分类号: C30B21/02

    摘要: A method of forming a planar waveguide structure, comprising forming a first graded layer on a substrate, wherein the first graded layer comprises a first and a second optical material, wherein the concentration of the first optical material increases with the height of the first graded layer; forming a second graded layer on the first graded layer, the second graded layer comprising the first and second optical materials wherein the concentration of the first optical material decreases with the height of the second graded layer. The method further including forming a uniform layer on the first graded layer, the uniform layer containing first and second optical materials wherein the first optical material concentration is constant.

    摘要翻译: 一种形成平面波导结构的方法,包括在衬底上形成第一渐变层,其中所述第一渐变层包括第一和第二光学材料,其中所述第一光学材料的浓度随着所述第一渐变层的高度而增加 ; 在所述第一渐变层上形成第二渐变层,所述第二渐变层包括所述第一和第二光学材料,其中所述第一光学材料的浓度随着所述第二渐变层的高度而降低。 该方法还包括在第一梯度层上形成均匀的层,所述均匀层包含第一和第二光学材料,其中第一光学材料浓度恒定。

    Optical ready substrates
    7.
    发明申请
    Optical ready substrates 审中-公开
    光学就绪基板

    公开(公告)号:US20070080414A1

    公开(公告)日:2007-04-12

    申请号:US11522856

    申请日:2006-09-18

    IPC分类号: H01L31/0232

    摘要: An article of manufacture comprising an optical-ready substrate made of a first semiconductor layer, an insulating layer on top of the first semiconductor layer, and a second semiconductor layer on top of the insulating layer, wherein the second semiconductor layer has a top surface and is laterally divided into two regions including a first region and a second region, the top surface of the first region being of a quality that is sufficient to permit microelectronic circuitry to be formed therein and the second region including an optical signal distribution circuit formed therein, the optical signal distribution circuit made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuit to be fabricated in the first region of the second semiconductor layer.

    摘要翻译: 一种制造方法,包括由第一半导体层制成的光学就绪衬底,在第一半导体层的顶部上的绝缘层和在绝缘层的顶部上的第二半导体层,其中第二半导体层具有顶表面和 横向分为包括第一区域和第二区域的两个区域,第一区域的顶表面具有足以允许在其中形成微电子电路的质量,并且第二区域包括其中形成的光信号分配电路, 所述光信号分配电路由互连的半导体光子元件组成并且被设计成向要在第二半导体层的第一区域中制造的微电子电路提供信号。