System and method to support dynamic partitioning of units to a shared resource
    1.
    发明授权
    System and method to support dynamic partitioning of units to a shared resource 有权
    支持将单位动态划分到共享资源的系统和方法

    公开(公告)号:US07478025B1

    公开(公告)日:2009-01-13

    申请号:US10418887

    申请日:2003-04-18

    IPC分类号: G06F17/50

    CPC分类号: G06F17/505

    摘要: A system and method for performing dynamic partitioning operations within a data processing system is disclosed. According to one embodiment, the current invention provides a system that allows an unit to be added to an executing data processing partition. The partition may include a shared resource that is receiving requests from other units that are already included within the partition. The inventive system includes means for programmably enabling the unit to the shared resource. Once the unit is so enabled, the system synchronizes the request arbitration being performed by this unit with the arbitration activities occurring within other units requesting access to the shared resource. This synchronization process prevents two units from attempting to simultaneously access the shared resource.

    摘要翻译: 公开了一种用于在数据处理系统内执行动态分区操作的系统和方法。 根据一个实施例,本发明提供一种允许将单元添加到执行数据处理分区的系统。 分区可以包括正在从已经包括在分区内的其他单元接收请求的共享资源。 本发明的系统包括用于可编程地使单元能够使共享资源的装置。 一旦该单元被启用,系统将由该单元执行的请求仲裁与请求访问共享资源的其他单元内发生的仲裁活动同步。 此同步过程可防止两个单元尝试同时访问共享资源。

    Dual mode capability for system bus
    2.
    发明授权
    Dual mode capability for system bus 有权
    系统总线双模能力

    公开(公告)号:US07254657B1

    公开(公告)日:2007-08-07

    申请号:US11118051

    申请日:2005-04-29

    IPC分类号: G06F1/00

    CPC分类号: G06F13/4217

    摘要: A computing system with a mode-selectable bus interface. In one embodiment, the computing system includes a system bus, a processor coupled to the bus via an interface unit, and a controller coupled to the bus. The system bus implements one of a first and a second system bus protocols. The interface unit is compatible with the first system bus protocol in a first selectable mode and the second system bus protocol in a second selectable mode, and the controller is compatible with one of the system bus protocols. A mode register is coupled to the interface unit, and the interface unit selects the first mode responsive to a first value of the mode register and selects the second mode responsive to a second value of the mode register. A scan controller is coupled to the mode register for scanning a value into the mode register.

    摘要翻译: 具有模式可选总线接口的计算系统。 在一个实施例中,计算系统包括系统总线,经由接口单元耦合到总线的处理器和耦合到总线的控制器。 系统总线实现第一和第二系统总线协议之一。 接口单元在第一可选模式下与第一系统总线协议兼容,第二系统总线协议以第二可选模式兼容,并且控制器与系统总线协议之一兼容。 模式寄存器耦合到接口单元,并且接口单元响应于模式寄存器的第一值来选择第一模式,并且响应于模式寄存器的第二值选择第二模式。 扫描控制器耦合到模式寄存器,用于将值扫描到模式寄存器中。

    System for data transfer across asynchronous interface
    4.
    发明授权
    System for data transfer across asynchronous interface 失效
    跨异步接口进行数据传输的系统

    公开(公告)号:US5867731A

    公开(公告)日:1999-02-02

    申请号:US695618

    申请日:1996-08-12

    IPC分类号: H04L12/46 G06F11/27

    CPC分类号: H04L12/46

    摘要: A system for use in transferring data packets across different clock domains using an input data register for receiving a block of data packets with the input data register and a plurality of interface registers located in the first clock domain for transferring a block of data packets from the input register to a second clock domain in response to a request signal with the system prioritizing the transfer of multiple data packets within the block of data packets by length in order to transfer the longer word packets first and the shorter word packets last with the shortest word packets within the block bundled together and simultaneously transferring across an asynchronous interface.

    摘要翻译: 一种用于使用输入数据寄存器在不同时钟域传输数据分组的系统,所述输入数据寄存器用于接收具有输入数据寄存器的数据分组块,以及位于第一时钟域中的多个接口寄存器,用于从 输入寄存器到第二时钟域,响应于请求信号,其中系统对数据分组块内的多个数据分组的传输进行优先级排序,以便首先传送较长的单词分组,并且用最短的单词传送较短的单词分组 块内的数据包捆绑在一起,同时跨异步接口传输。

    Processor command for prompting a storage controller to write a day
clock value to specified memory location
    5.
    发明授权
    Processor command for prompting a storage controller to write a day clock value to specified memory location 失效
    处理器命令,用于提示存储控制器将日期时钟值写入指定的存储位置

    公开(公告)号:US5809540A

    公开(公告)日:1998-09-15

    申请号:US577909

    申请日:1995-12-04

    IPC分类号: G06F1/14 G06F11/34 G07C1/00

    摘要: A method and apparatus for efficiently reading a day clock and storing the value into main storage. An advantage is that the memory storage command can request the main storage control to read a current day clock value and store the value into a main storage location specified by the requesting processor while allowing the requesting processor to continue processing other commands. A further advantage is that the requesting processor does not have to wait for the return of a day clock value or the generation of a main storage write request which may reduce the number of main storage I/O bus requests and bus transfer cycles over that normally required to transfer the day clock value to the requesting processor and then back to main storage.

    摘要翻译: 一种用于有效读取日间时钟并将该值存储到主存储器中的方法和装置。 优点是,存储器存储命令可以请求主存储控制器读取当前日期时钟值,并将该值存储到由请求处理器指定的主存储位置中,同时允许请求处理器继续处理其他命令。 另一个优点是,请求处理器不必等待日时钟值的返回或主存储写请求的产生,这可以减少主存储I / O总线请求的数量和总线传输周期的数量 将日间时钟值传送到请求处理器,然后返回到主存储器。

    Method for controlling and collecting information in a data processing system
    6.
    发明授权
    Method for controlling and collecting information in a data processing system 有权
    在数据处理系统中控制和收集信息的方法

    公开(公告)号:US07076767B1

    公开(公告)日:2006-07-11

    申请号:US09475563

    申请日:1999-12-30

    申请人: David P. Williams

    发明人: David P. Williams

    IPC分类号: G06F9/44

    CPC分类号: G06F11/3636

    摘要: A system and method for selectively collecting information within logical modules of the computing system, where the content collected and the collection periods are dynamically controllable to accurately target the most relevant information. One of a plurality of information storage modes is dynamically selected, where each of the information storage modes identifies a different set of information from the plurality of logical segments that is to be stored. At least one of a plurality of data collection periods is dynamically selected, where the data collection periods define temporal windows in which storage of the designated set of information is enabled. The designated set of information identified by the designated information storage mode is stored only during the designated data collection period.

    摘要翻译: 一种用于选择性地收集计算系统的逻辑模块内的信息的系统和方法,其中收集的内容和收集周期是动态可控的以准确地定位最相关的信息。 动态地选择多个信息存储模式中的一个,其中每个信息存储模式从要存储的多个逻辑段识别不同的信息集合。 动态地选择多个数据收集周期中的至少一个,其中数据收集周期定义其中启用了指定信息集的存储的时间窗口。 由指定信息存储模式识别的指定信息集仅在指定的数据收集期间存储。

    Anti-short bushing
    10.
    发明授权
    Anti-short bushing 失效
    防短套管

    公开(公告)号:US4752652A

    公开(公告)日:1988-06-21

    申请号:US903402

    申请日:1986-09-03

    IPC分类号: H01B7/24 H02G3/06 H01B17/58

    摘要: An anti-short bushing, for use between a tubular metal sheath and an electrical conductor carried within the metal sheath, comprising a tubular insulative unit configured to be inserted between the sheath and the conductor. The tubular insulative unit is formed as a single molded piece having three connected segments. Two of the segments are generally semi-cylindrical and each has a shoulder projecting radially therefrom at one end. The two segments are connected by an elongated hinge which permits them to be folded relative to one another to form a tubular configuration with their shoulders forming a partial circumferential shoulder. The third segment is connected to the elongated hinge by a second hinge to permit the third segment to be rotated to project radially outwardly so as to form with the two shoulders of the other two segments a complete circumferential shoulder.

    摘要翻译: 用于管状金属护套和承载在金属护套内的电导体之间的防短衬套,包括构造成插入护套和导体之间的管状绝缘单元。 管状绝缘单元形成为具有三个连接段的单个模制件。 两个片段通常是半圆柱形的,并且每个片段的一端具有从其径向突出的肩部。 两个部分通过细长的铰链连接,这允许它们相对于彼此折叠以形成其肩部形成部分周向肩部的管状构造。 第三段通过第二铰链连接到细长铰链,以允许第三段旋转以径向向外突出,以便与其他两个段的两个肩部形成完整的周向肩部。