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公开(公告)号：US07480066B2
公开(公告)日：2009-01-20
申请号：US10903560
申请日：2004-07-29
IPC分类号： G06F3/12
CPC分类号： H04N1/047 , H04N1/1135 , H04N1/12 , H04N2201/0082 , H04N2201/04767 , Y10T307/68 , Y10T307/691 , Y10T307/718
摘要： A video controller includes a video block that connects to the print control engine and one laser driver. The video block includes a direct memory access (DMA) block, a video processor, a waveform generator including pattern and multiple pulse mode modulation, a frequency synthesizer, configuration registers, and a data bus. The frequency synthesizer connects to the waveform generator. The configuration registers connect to the DMA block, video processor and the waveform generator. The data bus, operative to carry bus control signals, connects the DMA block, video processor, waveform generator, and the configuration registers.
摘要翻译： 视频控制器包括连接到打印控制引擎和一个激光驱动器的视频块。 视频块包括直接存储器访问（DMA）块，视频处理器，包括模式和多脉冲模式调制的波形发生器，频率合成器，配置寄存器和数据总线。 频率合成器连接到波形发生器。 配置寄存器连接到DMA块，视频处理器和波形发生器。 数据总线，用于传送总线控制信号，连接DMA块，视频处理器，波形发生器和配置寄存器。
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公开(公告)号：US07145371B2
公开(公告)日：2006-12-05
申请号：US10903604
申请日：2004-07-30
IPC分类号： H03B19/00
CPC分类号： H03L7/06
摘要： A digital circuit generates very precise varying clock frequencies for applications that can tolerate a small degree of jitter but require exact longer term frequencies, e.g. a video clock for a laser printer. Some subpixel jitter is acceptable, but the overall pixel rate remains exact and consistent. In some applications, the jitter may be desirable to smear the EMI spectrum. For example, if the high frequency input clock is modulated, the edges of the video clock will also be modulated yet remain within the jitter and frequency specification.
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公开(公告)号：US07975094B2
公开(公告)日：2011-07-05
申请号：US10826886
申请日：2004-04-15
CPC分类号： G06F13/385
摘要： The invention provides an architecture and method for implementing a programmable I/O interface. The primary function provides a generic reconfigurable interface for serial communications between a laser printer controller and the print mechanism. The design also supports vertical page synchronization (top of page detection).
摘要翻译： 本发明提供了一种用于实现可编程I / O接口的架构和方法。 主要功能为激光打印机控制器和打印机构之间的串行通信提供通用的可重新配置接口。 该设计还支持垂直页面同步（页首检测）。
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公开(公告)号：US07425976B2
公开(公告)日：2008-09-16
申请号：US11471392
申请日：2006-06-20
CPC分类号： H03L7/06
摘要： A digital circuit generates very precise varying clock frequencies for applications that can tolerate a small degree of jitter but require exact longer term frequencies, e.g. a video clock for a laser printer. Some subpixel jitter is acceptable, but the overall pixel rate remains exact and consistent. In some applications, the jitter may be desirable to smear the EMI spectrum. For example, if the high frequency input clock is modulated, the edges of the video clock will also be modulated yet remain within the jitter and frequency specification.
摘要翻译： 数字电路为可以容忍小程度的抖动但需要精确的较长期频率的应用产生非常精确的变化的时钟频率，例如， 用于激光打印机的视频时钟。 一些子像素抖动是可接受的，但是整体像素速率保持精确和一致。 在一些应用中，可能需要抖动以涂抹EMI频谱。 例如，如果调制高频输入时钟，则视频时钟的边沿也将被调制，但仍保持在抖动和频率规范内。
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公开(公告)号：US08127070B2
公开(公告)日：2012-02-28
申请号：US13175481
申请日：2011-07-01
CPC分类号： G06F13/385
摘要： The invention provides an architecture and method for implementing a programmable I/O interface. The primary function provides a generic reconfigurable interface for serial communications between a laser printer controller and the print mechanism. The design also supports vertical page synchronization (top of page detection).
摘要翻译： 本发明提供了一种用于实现可编程I / O接口的架构和方法。 主要功能为激光打印机控制器和打印机构之间的串行通信提供通用的可重新配置接口。 该设计还支持垂直页面同步（页首检测）。
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公开(公告)号：US20110307634A1
公开(公告)日：2011-12-15
申请号：US13175481
申请日：2011-07-01
IPC分类号： G06F13/28
CPC分类号： G06F13/385
摘要： The invention provides an architecture and method for implementing a programmable I/O interface. The primary function provides a generic reconfigurable interface for serial communications between a laser printer controller and the print mechanism. The design also supports vertical page synchronization (top of page detection).
摘要翻译： 本发明提供了一种用于实现可编程I / O接口的架构和方法。 主要功能为激光打印机控制器和打印机构之间的串行通信提供通用的可重新配置接口。 该设计还支持垂直页面同步（页首检测）。
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7.发明授权Integrated circuit and method for detecting the state of an oscillating signal 有权用于检测振荡信号状态的集成电路和方法公开(公告)号：US07155628B2
公开(公告)日：2006-12-26
申请号：US10411427
申请日：2003-04-10
IPC分类号： G06F1/04
CPC分类号： G06F1/3215 , G06F1/325 , G06F1/3284 , Y02D10/159
摘要： Embodiments of the present invention are described in an integrated circuit. The integrated circuit comprises circuit elements configured to be clocked via an oscillating signal, and a detector. The detector is configured to detect a state of the oscillating signal and provide a detection signal indicative of the state of the oscillating signal. The detector comprises a first delay line configured to provide a first delayed signal to logic that provides the detection signal.
摘要翻译： 在集成电路中描述本发明的实施例。 该集成电路包括被配置为经振荡信号计时的电路元件和检测器。 检测器被配置为检测振荡信号的状态并提供表示振荡信号的状态的检测信号。 检测器包括第一延迟线，其被配置为向提供检测信号的逻辑提供第一延迟信号。
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公开(公告)号：US07107362B2
公开(公告)日：2006-09-12
申请号：US10440634
申请日：2003-05-19
IPC分类号： G06F13/00
CPC分类号： G06F11/3466 , G01R31/31724 , G01R31/3173 , G11C2029/4402
摘要： Embodiments of the present invention provide an integrated circuit. In one embodiment, the integrated circuit comprises logic blocks, a measurement circuit and a control circuit. The measurement circuit is configured to measure operating parameters of the integrated circuit and the logic blocks and provide operating parameter data. The control circuit is configured to receive the operating parameter data, evaluate the operating parameter data to obtain configuration data and configure the integrated circuit with the configuration data.
摘要翻译： 本发明的实施例提供一种集成电路。 在一个实施例中，集成电路包括逻辑块，测量电路和控制电路。 测量电路被配置为测量集成电路和逻辑块的操作参数并提供操作参数数据。 控制电路被配置为接收操作参数数据，评估操作参数数据以获得配置数据并且使用配置数据来配置集成电路。
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公开(公告)号：US07359082B2
公开(公告)日：2008-04-15
申请号：US10689321
申请日：2003-10-20
CPC分类号： H04N1/053 , G06K15/1204 , H04N1/1135 , H04N2201/0471 , H04N2201/04732 , H04N2201/04744 , H04N2201/04767
摘要： A printer includes a direct memory access controller (DMA), a video processor, and a video signal generator. A frequency synthesizer connects to the video signal generator. Configuration registers bidirectionally connect to the DMA, video processor, the video signal generator and the frequency synthesizer. A data bus electrically connects the DMA and the configuration registers.
摘要翻译： 打印机包括直接存储器存取控制器（DMA），视频处理器和视频信号发生器。 频率合成器连接到视频信号发生器。 配置寄存器双向连接到DMA，视频处理器，视频信号发生器和频率合成器。 数据总线将DMA和配置寄存器电连接。
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公开(公告)号：US07146285B2
公开(公告)日：2006-12-05
申请号：US10440581
申请日：2003-05-19
IPC分类号： G06F19/00
CPC分类号： G11C29/02 , G06F11/348 , G11C29/50012 , G11C2029/0401
摘要： Embodiments of the present invention provide an integrated circuit. In one embodiment, the integrated circuit comprises logic blocks and a measurement circuit. The measurement circuit is configured to measure internal operating parameters of the integrated circuit to obtain operating parameter data and provide the operating parameter data for evaluation and configuration of the integrated circuit and the logic blocks.
摘要翻译： 本发明的实施例提供一种集成电路。 在一个实施例中，集成电路包括逻辑块和测量电路。 测量电路被配置为测量集成电路的内部操作参数以获得操作参数数据，并提供用于集成电路和逻辑块的评估和配置的操作参数数据。
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