公开(公告)号：US08279694B2

公开(公告)日：2012-10-02

申请号：US12826918

申请日：2010-06-30

申请人： Duck Hwa Hong ,  Sang Il Park

发明人： Duck Hwa Hong ,  Sang Il Park

IPC分类号： G11C16/04

CPC分类号： G11C11/4091 ,  G11C7/02 ,  G11C7/06 ,  G11C7/08

摘要： A semiconductor memory device having a reduced noise interference is presented. The semiconductor memory device includes a first switch and a second switch. The first switch is disposed in a sub hole region or an edge region and is configured to be turned on in response to a first pre-control signal, which is enabled before a time point at which a sense amplifier array begins to operate, and to apply an external voltage to a first voltage line through which a bias voltage is supplied to the sense amplifier array. The second switch is configured to be turned on in response to a first control signal, which is enabled in a sense amplifier overdriving period, and to apply the external voltage to the first voltage line.

摘要翻译： 提出了具有降低的噪声干扰的半导体存储器件。 半导体存储器件包括第一开关和第二开关。 第一开关设置在子孔区域或边缘区域中，并且被配置为响应于在读出放大器阵列开始运行的时间点之前使能的第一预控制信号而导通，以及 将外部电压施加到向读出放大器阵列提供偏置电压的第一电压线。 第二开关被配置为响应于在感测放大器过驱动周期中被使能的第一控制信号而导通，并且将外部电压施加到第一电压线。

公开(公告)号：US08294486B2

公开(公告)日：2012-10-23

申请号：US12648745

申请日：2009-12-29

申请人： Duck Hwa Hong

发明人： Duck Hwa Hong

IPC分类号： H03K19/003

CPC分类号： G11C29/83 ,  G11C29/785

摘要： A repair circuit having a repair controller which is capable of reducing unnecessary current dissipation by interrupting a control operation to redundant cells that are unused for replacement of defective cells is presented. The repair circuit includes a repair controller and a repair signal generator. The repair controller is configured to generate a first drive voltage, a second drive voltage and a repair control signal depending on whether or not a defective cell exists. The repair signal generator driven by the first and second drive voltages in which the repair signal generator is configured to generate a repair signal, for repairing the defective cell, in response to receiving the repair control signal and an external address.

摘要翻译： 提供一种具有修复控制器的修复电路，其能够通过中断对未用于更换有缺陷的单元的冗余单元的控制操作来减少不必要的电流消耗。 修理电路包括修理控制器和修复信号发生器。 修理控制器被配置为根据是否存在有缺陷的单元来产生第一驱动电压，第二驱动电压和修复控制信号。 修复信号发生器由第一和第二驱动电压驱动，其中修复信号发生器被配置为响应于接收到修复控制信号和外部地址而产生用于修复缺陷单元的修复信号。

公开(公告)号：US20090303810A1

公开(公告)日：2009-12-10

申请号：US12286877

申请日：2008-10-02

申请人： Duck Hwa Hong

发明人： Duck Hwa Hong

IPC分类号： G11C7/00 ,  G11C8/00 ,  G11C5/14

CPC分类号： G11C5/147 ,  G11C8/08 ,  G11C8/14 ,  G11C2029/0407

摘要： Disclosed is a semiconductor memory device. The semiconductor memory device includes a signal generating unit for generating first and second enable signals in response to a power-up signal, a first sub-word line signal driving unit for driving a first sub-word line signal in response to the first enable signal, a first voltage supplying unit for supplying a first voltage to a pair of bit lines in response to the first enable signal, a second sub-word line signal driving unit for driving a second sub-word line signal in response to the second enable signal, and a second voltage supplying unit for supplying a second voltage to a pair of bit lines in response to the second enable signal.

摘要翻译： 公开了一种半导体存储器件。 半导体存储器件包括：信号产生单元，用于响应于上电信号产生第一和第二使能信号;第一子字线信号驱动单元，用于响应于第一使能信号驱动第一子字线信号 第一电压提供单元，用于响应于第一使能信号向一对位线提供第一电压;第二子字线信号驱动单元，用于响应于第二使能信号驱动第二子字线信号 以及第二电压提供单元，用于响应于第二使能信号向一对位线提供第二电压。

公开(公告)号：US08036054B2

公开(公告)日：2011-10-11

申请号：US12286877

申请日：2008-10-02

申请人： Duck Hwa Hong

发明人： Duck Hwa Hong

IPC分类号： G11C29/00 ,  G11C7/00

CPC分类号： G11C5/147 ,  G11C8/08 ,  G11C8/14 ,  G11C2029/0407

摘要： A semiconductor memory device includes a signal generating unit for generating first and second enable signals in response to a power-up signal, a first sub-word line signal driving unit for driving a first sub-word line signal in response to the first enable signal, a first voltage supplying unit for supplying a first voltage to a pair of bit lines in response to the first enable signal, a second sub-word line signal driving unit for driving a second sub-word line signal in response to the second enable signal, and a second voltage supplying unit for supplying a second voltage to a pair of bit lines in response to the second enable signal.

摘要翻译： 半导体存储器件包括：响应于上电信号产生第一和第二使能信号的信号产生单元，用于响应于第一使能信号驱动第一子字线信号的第一子字线信号驱动单元 第一电压提供单元，用于响应于第一使能信号向一对位线提供第一电压;第二子字线信号驱动单元，用于响应于第二使能信号驱动第二子字线信号 以及第二电压提供单元，用于响应于第二使能信号向一对位线提供第二电压。

公开(公告)号：US07990788B2

公开(公告)日：2011-08-02

申请号：US12215459

申请日：2008-06-27

申请人： Duck Hwa Hong ,  Sun Jong Yoo

发明人： Duck Hwa Hong ,  Sun Jong Yoo

IPC分类号： G11C29/00

CPC分类号： G11C29/50 ,  G11C11/401 ,  G11C29/50016

摘要： A refresh characteristic test circuit is provided, in a recessed semiconductor device, that is capable of verifying whether a refresh failure is caused by the neighbor/passing gate effect or not and a method for testing the refresh characteristic. The refresh characteristic test circuit includes a select signal generating unit for receiving first address signals and a test mode signal and generate select signals to select cell blocks, a main word line signal generating unit for receiving second address signals and the test mode signal and generate main word lines signals to select main word lines of the selected cell block, and a sub word line signal generating unit for receiving third address signals and the test mode signal and enable sub word lines of the selected main word line.

摘要翻译： 在凹陷半导体器件中提供了一种刷新特性测试电路，其能够验证刷新故障是否由相邻/通过门效应引起，以及用于测试刷新特性的方法。 刷新特性测试电路包括用于接收第一地址信号和测试模式信号并产生选择信号以选择单元块的选择信号产生单元，用于接收第二地址信号的主字线信号产生单元和测试模式信号并产生主 字线信号以选择所选择的单元块的主字线，以及子字线信号生成单元，用于接收第三地址信号和测试模式信号，并使所选主字线的子字线使能。

公开(公告)号：US20090052264A1

公开(公告)日：2009-02-26

申请号：US12215459

申请日：2008-06-27

申请人： Duck Hwa Hong ,  Sun Jong Yoo

发明人： Duck Hwa Hong ,  Sun Jong Yoo

IPC分类号： G11C29/00 ,  G11C8/00

CPC分类号： G11C29/50 ,  G11C11/401 ,  G11C29/50016

摘要： A refresh characteristic test circuit is provided, in a recessed semiconductor device, that is capable of verifying whether a refresh failure is caused by the neighbor/passing gate effect or not and a method for testing the refresh characteristic. The refresh characteristic test circuit includes a select signal generating unit for receiving first address signals and a test mode signal and generate select signals to select cell blocks, a main word line signal generating unit for receiving second address signals and the test mode signal and generate main word lines signals to select main word lines of the selected cell block, and a sub word line signal generating unit for receiving third address signals and the test mode signal and enable sub word lines of the selected main word line.

摘要翻译： 在凹陷半导体器件中提供了一种刷新特性测试电路，其能够验证刷新故障是否由相邻/通过门效应引起，以及用于测试刷新特性的方法。 刷新特性测试电路包括用于接收第一地址信号和测试模式信号并产生选择信号以选择单元块的选择信号产生单元，用于接收第二地址信号的主字线信号产生单元和测试模式信号并产生主 字线信号以选择所选择的单元块的主字线，以及子字线信号生成单元，用于接收第三地址信号和测试模式信号，并使所选主字线的子字线使能。

公开(公告)号：US08331174B2

公开(公告)日：2012-12-11

申请号：US12833819

申请日：2010-07-09

申请人： Seong Nyuh Yoo ,  Duck Hwa Hong ,  Saeng Hwan Kim

发明人： Seong Nyuh Yoo ,  Duck Hwa Hong ,  Saeng Hwan Kim

IPC分类号： G11C29/00

CPC分类号： G11C29/76 ,  G11C29/785 ,  G11C29/806

摘要： A semiconductor memory device includes: a repair address generation unit configured to generate a repair address signal in response to a first address signal; a line choice address generation unit configured to generate a line choice address signal by combining the first address signal and the repair address signal according to a determination as to whether the repair address signal is to be used; and a cell line decoding unit configured to select one of a normal cell region and a redundancy cell region according to the determination, and select one of a plurality of local cell lines provided in the selected cell region in response to the line choice address signal.

摘要翻译： 半导体存储器件包括：修复地址生成单元，被配置为响应于第一地址信号产生修复地址信号; 线路选择地址生成单元，被配置为根据关于是否使用修复地址信号的确定，通过组合第一地址信号和修复地址信号来生成行选择地址信号; 以及细胞线解码单元，被配置为根据该确定来选择正常小区区域和冗余小区区域中的一个，并且响应于线路选择地址信号选择提供在所选择的小区区域中的多个本地小区线路中的一个。

公开(公告)号：US20110242917A1

公开(公告)日：2011-10-06

申请号：US12833819

申请日：2010-07-09

申请人： Seong Nyuh Yoo ,  Duck Hwa Hong ,  Saeng Hwan Kim

发明人： Seong Nyuh Yoo ,  Duck Hwa Hong ,  Saeng Hwan Kim

IPC分类号： G11C29/04

CPC分类号： G11C29/76 ,  G11C29/785 ,  G11C29/806

摘要： A semiconductor memory device includes: a repair address generation unit configured to generate a repair address signal in response to a first address signal; a line choice address generation unit configured to generate a line choice address signal by combining the first address signal and the repair address signal according to a determination as to whether the repair address signal is to be used; and a cell line decoding unit configured to select one of a normal cell region and a redundancy cell region according to the determination, and select one of a plurality of local cell lines provided in the selected cell region in response to the line choice address signal.

摘要翻译： 半导体存储器件包括：修复地址生成单元，被配置为响应于第一地址信号产生修复地址信号; 线路选择地址生成单元，被配置为根据关于是否使用修复地址信号的确定，通过组合第一地址信号和修复地址信号来生成行选择地址信号; 以及细胞线解码单元，被配置为根据该确定来选择正常小区区域和冗余小区区域中的一个，并且响应于线路选择地址信号选择提供在所选择的小区区域中的多个本地小区线路中的一个。