摘要:
A semiconductor memory device includes at least one first semiconductor chip including a plurality of memory cells and a second semiconductor chip including a fuse circuit configured to repair defective cells among the memory cells of the at least one first semiconductor chip.
摘要:
A semiconductor memory device includes: a repair address generation unit configured to generate a repair address signal in response to a first address signal; a line choice address generation unit configured to generate a line choice address signal by combining the first address signal and the repair address signal according to a determination as to whether the repair address signal is to be used; and a cell line decoding unit configured to select one of a normal cell region and a redundancy cell region according to the determination, and select one of a plurality of local cell lines provided in the selected cell region in response to the line choice address signal.
摘要:
A semiconductor memory device includes: a repair address generation unit configured to generate a repair address signal in response to a first address signal; a line choice address generation unit configured to generate a line choice address signal by combining the first address signal and the repair address signal according to a determination as to whether the repair address signal is to be used; and a cell line decoding unit configured to select one of a normal cell region and a redundancy cell region according to the determination, and select one of a plurality of local cell lines provided in the selected cell region in response to the line choice address signal.
摘要:
A block isolation control circuit includes: a control signal generation unit configured to generate a control signal which is disabled when a defect occurs in a cell block and it is necessary to replace a defective cell block with a redundant cell block, or when the cell block is not selected in a test mode; and at least one switch element connected between the cell block and a bit line sense amplifier, wherein the switch element isolates the cell block from the bit line sense amplifier when the control signal is disabled.
摘要:
A multi-driving apparatus by a multi-level detection which pluralizes a voltage detection level in order to effectively operate voltage generators in the voltage generation circuit, minimizes a level fluctuation, reduces noise influenced on a total operation of the apparatus, increases a reliability of the apparatus, and reduces the power-consumption. The multi-driving apparatus includes: a level detection circuit block which receives a step-up voltage VPP or a back-bias voltage VBB as an input, and detects different level potentials; a control circuit block for controlling an operation of each generator according to a detected potential by the level detection circuit block; an oscillation circuit block which is oscillated by an enable signal being output from the control circuit block, and generates electric vibrations; and a generation circuit block which receives a control signal from the control circuit block as an input, and is comprised of a plurality of generators being driven by an oscillation output from the oscillation circuit block.
摘要:
The present invention discloses a method and a device for automatically performing a refresh operation, which can reduce power consumption in an auto refresh mode of a semiconductor memory device. The power consumption can be reduced by controlling the operation of input buffers or the operation of an input buffer generator for controlling the input buffers, during the auto refresh operation. The device for automatically performing the refresh operation in the semiconductor memory device, includes: a plurality of input buffers; an input buffer generator for controlling the operation of the plurality of input buffers; a command decoder for decoding a signal from one input buffer among the plurality of input buffers, and generating an auto refresh signal; a row active generator for generating a row active signal as the auto refresh signal is enabled; a delay generator for generating a delay signal delayed as long as a RAS cycle time according to the row active signal; and an auto refresh generator for controlling the plurality of input buffers by employing a control signal decided by the combination of the auto refresh signal from the command decoder and the delay signal from the delay generator.
摘要:
A temperature sensor includes: a gate voltage generation unit including a bias resistor, a first source resistor, and a first MOS transistor and configured to generate a gate voltage; and a variable voltage output unit including an output resistor, a second source resistor, and a second MOS transistor and configured to generate the variable voltage.
摘要:
A temperature sensor includes: a gate voltage generation unit including a bias resistor, a first source resistor, and a first MOS transistor and configured to generate a gate voltage; and a variable voltage output unit including an output resistor, a second source resistor, and a second MOS transistor and configured to generate the variable voltage.
摘要:
A internal voltage generator includes a plurality of voltage level detection units, each configured to detect a voltage level of a corresponding internal voltage terminal, based on a predetermined target voltage level assigned to the corresponding internal voltage terminal, and generate a detection signal, a common internal voltage generation unit configured to generate an internal voltage through a pumping operation in response to the detection signal outputted from the voltage level detection units, and a path multiplexing unit configured to selectively output the internal voltage to one of the internal voltage terminals.
摘要:
A method for driving a semiconductor memory device, includes initializing first data corresponding to a refresh time of each corresponding row included in a cell array; storing second data corresponding to column data included in the first row after entering a self refresh mode; setting the first data corresponding to the first row by detecting the refresh time of the first row while performing refresh operations on the other rows in the cell array according to a refresh period selected based on the corresponding first data for predetermined refresh cycles, wherein the refresh operation is not performed on the first row during the predetermined refresh cycles; restoring the second data to the first row; and repeating the above steps for the other rows to thereby set the corresponding first data until the setting step is completed for all rows or the self refresh mode expires.