公开(公告)号：US10978576B2

公开(公告)日：2021-04-13

申请号：US16597713

申请日：2019-10-09

申请人： ELPIS TECHNOLOGIES INC.

发明人： Chi-Chun Liu ,  Chun Wing Yeung ,  Robin Hsin Kuo Chao ,  Zhenxing Bi ,  Kristin Schmidt ,  Yann Mignot

IPC分类号： H01L29/66 ,  H01L21/311 ,  H01L29/40 ,  H01L29/423 ,  H01L21/3105 ,  H01L29/78

摘要： Techniques for VFET gate length control are provided. In one aspect, a method of forming a VFET device includes: patterning fins in a substrate; forming first polymer spacers alongside opposite sidewalls of the fins; forming second polymer spacers offset from the fins by the first polymer spacers; removing the first polymer spacers selective to the second polymer spacers; reflowing the second polymer spacers to close a gap to the fins; forming a cladding layer above the second polymer spacers; removing the second polymer spacers; forming gates along opposite sidewalls of the fins exposed in between the bottom spacers and the cladding layer, wherein the gates have a gate length Lg set by removal of the second polymer spacers; forming top spacers above the cladding layer; and forming top source and drains above the top spacers. A VFET device is also provided.