公开(公告)号：US3644895A

公开(公告)日：1972-02-22

申请号：US3644895D

申请日：1970-02-05

Applicant: ERICSSON TELEFON AB L M

Inventor： HEMDAL GORAN ANDERS HENRIK ,  LENNMARKER NILS BERTIL

IPC: G06F13/10 ,  G06F3/06 ,  G06F5/10 ,  G06F13/22 ,  G11C15/00 ,  H04Q3/545 ,  G06F13/00 ,  H04Q3/54

CPC classification number: G06F5/10 ,  G06F13/22 ,  H04Q3/545

Abstract: A buffer store arrangement in a data controlled telecommunication system for delaying by a predetermined number of periods of a clock frequency the addressing of addresses separated by a restoration value. The arrangement comprises store cells with registering circuits and restoration circuits in the input side and reading circuits on the output side, a registering counter, a reading counter and a clock pulse generator. Each restoration circuit is connected to the clock pulse generator so that the restoration value is registered before the registering counter is activated. A data processor has an input register, which on its output is connectable to the registering circuits for registering data in a certain cell and to the registering counter for stepping at registering, and an output register. By setting the registering and reading counters so that they point out cells separated by a certain number of cells containing the restoration value, the desired delay is obtained which corresponds to the product of the clock pulse period and the said predetermined number of cells.