AC and DC input power supply
    1.
    发明授权
    AC and DC input power supply 有权
    交流和直流输入电源

    公开(公告)号:US6134125A

    公开(公告)日:2000-10-17

    申请号:US313228

    申请日:1999-05-17

    Inventor: Edward P. Wenzel

    CPC classification number: H02M1/10 H02M3/335

    Abstract: An AC and DC input power supply includes an AC power supply circuit and an AC input for receiving a range of AC input voltages. A rectifier circuit is connected to the AC input. An isolation output transformer has first and second primary winding terminals and a low voltage winding section for connecting to a DC voltage input that is lower than the range of the DC voltage that is rectified from the range of AC input voltages. The rectifier circuit is connected to the first primary winding terminal of the isolation output transformer. A transistor is connected to the second primary winding terminal of the isolation output transformer. The DC power supply circuit includes a DC input that is selectably connectable between the first primary winding terminal when the voltage input to the DC input connector is a nominal DC voltage that is within the range of the DC bulk voltage and the low voltage winding section when the voltage input to the DC input is lower than the range of the DC bulk voltage.

    Abstract translation: AC和DC输入电源包括AC电源电路和用于接收一定范围的AC输入电压的AC输入。 整流电路连接到交流输入。 隔离输出变压器具有第一和第二初级绕组端子和低压绕组部分,用于连接到低于从AC输入电压范围整流的DC电压的范围的DC电压输入。 整流电路连接到隔离输出变压器的第一初级绕组端子。 晶体管连接到隔离输出变压器的第二初级绕组端子。 直流电源电路包括直流输入端,当输入到直流输入连接器的电压是直流体电压和低压绕组部分的范围内的标称直流电压时,可选择地连接在第一初级绕组端子之间, 输入到DC输入的电压低于直流体电压的范围。

    Power limiting time delay circuit
    2.
    发明授权
    Power limiting time delay circuit 有权
    电源限流延时电路

    公开(公告)号:US06885530B2

    公开(公告)日:2005-04-26

    申请号:US10166876

    申请日:2002-06-11

    Inventor: Edward P. Wenzel

    CPC classification number: G06F1/28 G05F1/569 G06F1/26 Y10T307/944

    Abstract: A power limiting circuit for power supply that is controlled by a power supply control module includes a shunt regulator having a reference input operatively connected to a voltage input that receives a voltage representative of the power supply control module connected thereto. The shunt regulator is biased on when the voltage at the reference input increases above a reference voltage established at the voltage input. A transistor is operatively connected to the shunt regulator and to an output operatively connected to the power supply control module and has a voltage that is representative of voltage operating the power supply control module. The transistor is biased on from the shunt regulator such that the shunt regulator and transistor form a latch when the voltage at the output reduces below an off voltage level to turn off the power supply, dropping the input voltage, and restarting the power supply in a restart cycle.

    Abstract translation: 由电源控制模块控制的用于电源的功率限制电路包括具有可操作地连接到电压输入的参考输入的并联调节器,该电压输入接收代表与其连接的电源控制模块的电压。 当参考输入端的电压增加到电压输入端所建立的参考电压以上时,分流稳压器被偏置。 晶体管可操作地连接到分流调节器和可操作地连接到电源控制模块的输出端,并且具有代表操作电源控制模块的电压的电压。 晶体管从分流调节器偏置,使得当输出端的电压降低到关断电压以下时,并联稳压器和晶体管形成锁存器,以关断电源,降低输入电压,并重新启动电源 重启循环。

    Power limiting time delay circuit

    公开(公告)号:US07102860B2

    公开(公告)日:2006-09-05

    申请号:US11059838

    申请日:2005-02-17

    Inventor: Edward P. Wenzel

    CPC classification number: G06F1/28 G05F1/569 G06F1/26 Y10T307/944

    Abstract: A power limiting circuit for power supply that is controlled by a power supply control module includes a shunt regulator having a reference input operatively connected to a voltage input that receives a voltage representative of the power supply control module connected thereto. The shunt regulator is biased on when the voltage at the reference input increases above a reference voltage established at the voltage input. A transistor is operatively connected to the shunt regulator and to an output operatively connected to the power supply control module and has a voltage that is representative of voltage operating the power supply control module. The transistor is biased on from the shunt regulator such that the shunt regulator and transistor form a latch when the voltage at the output reduces below an off voltage level to turn off the power supply, dropping the input voltage, and restarting the power supply in a restart cycle.

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