公开(公告)号：US06795909B2

公开(公告)日：2004-09-21

申请号：US10114646

申请日：2002-04-01

申请人： Edwin F. Barry ,  Gerald G. Pechanek ,  Thomas L. Drabenstott ,  Edward A. Wolff ,  Nikos P. Pitsianis ,  Grayson Morris

发明人： Edwin F. Barry ,  Gerald G. Pechanek ,  Thomas L. Drabenstott ,  Edward A. Wolff ,  Nikos P. Pitsianis ,  Grayson Morris

IPC分类号： G06F1517

CPC分类号： G06F15/17381 ,  H04L49/1553 ,  H04L49/201 ,  H04L49/3009 ,  H04L49/45

摘要： Processing element to processing element switch connection control is described using a receive model that precludes communication hazards from occurring in a synchronous MIMD mode of operation. Such control allows different communication topologies and various processing effects such as an array transpose, hypercomplement or the like to be efficiently achieved utilizing architectures, such as the manifold array processing architecture. An encoded instruction method reduces the amount of state information and setup burden on the programmer taking advantage of the recognition that the majority of algorithms will use only a small fraction of all possible mux settings available. Thus, by means of transforming the PE identification based upon a communication path specified by a PE communication instruction an efficient switch control mechanism can be used. This control mechanism allows PE register broadcast operations as well as the standard mesh and hypercube communication paths over the same interconnection network. PE to PE communication instructions PEXCHG, SPRECV and SPSEND are also defined and implemented.

摘要翻译： 使用接收模型描述处理元件切换连接控制的处理元件，该接收模型排除在同步MIMD操作模式中发生通信危险。 这样的控制允许利用诸如歧管阵列处理架构的架构有效地实现不同的通信拓扑和各种处理效果，例如阵列转置，超补充等。 编码指令方法通过利用大多数算法仅使用所有可能的多路复用器设置的一小部分的识别来减少程序员的状态信息和设置负担的量。 因此，通过基于由PE通信指令指定的通信路径变换PE标识，可以使用有效的开关控制机构。 该控制机制允许PE寄存器广播操作以及相同互连网络上的标准网格和超立方体通信路径。 PE到PE通信指令PEXCHG，SPRECV和SPSEND也被定义和实现。

公开(公告)号：US06366997B1

公开(公告)日：2002-04-02

申请号：US09649647

申请日：2000-08-29

申请人： Edwin F. Barry ,  Gerald G. Pechanek ,  Thomas L. Drabenstott ,  Edward A. Wolff ,  Nikos P. Pitsianis ,  Grayson Morris

发明人： Edwin F. Barry ,  Gerald G. Pechanek ,  Thomas L. Drabenstott ,  Edward A. Wolff ,  Nikos P. Pitsianis ,  Grayson Morris

IPC分类号： G06F1576

CPC分类号： G06F15/17381 ,  H04L49/1553 ,  H04L49/201 ,  H04L49/3009 ,  H04L49/45

摘要： Processing element to processing element switch connection control is described using a receive model that precludes communication hazards from occurring in a synchronous MIMD mode of operation. Such control allows different communication topologies and various processing effects such as an array transpose, hypercomplement or the like to be efficiently achieved utilizing architectures, such as the manifold array processing architecture. An encoded instruction method reduces the amount of state information and setup burden on the programmer taking advantage of the recognition that the majority of algorithms will use only a small fraction of all possible mux settings available. Thus, by means of transforming the PE identification based upon a communication path specified by a PE communication instruction an efficient switch control mechanism can be used. This control mechanism allows PE register broadcast operations as well as the standard mesh and hypercube communication paths over the same interconnection network. PE to PE communication instructions PEXCHG, SPRECV and SPSEND are also defined and implemented.

摘要翻译： 使用接收模型描述处理元件切换连接控制的处理元件，该接收模型排除在同步MIMD操作模式中发生通信危险。 这样的控制允许利用诸如歧管阵列处理架构的架构有效地实现不同的通信拓扑和各种处理效果，例如阵列转置，超补充等。 编码指令方法通过利用大多数算法仅使用所有可能的多路复用器设置的一小部分的识别来减少程序员的状态信息和设置负担的量。 因此，通过基于由PE通信指令指定的通信路径变换PE标识，可以使用有效的开关控制机构。 该控制机制允许PE寄存器广播操作以及相同互连网络上的标准网格和超立方体通信路径。 PE到PE通信指令PEXCHG，SPRECV和SPSEND也被定义和实现。

公开(公告)号：US6167501A

公开(公告)日：2000-12-26

申请号：US169256

申请日：1998-10-09

申请人： Edwin F. Barry ,  Gerald G. Pechanek ,  Thomas L. Drabenstott ,  Edward A. Wolff ,  Nikos P. Pitsianis ,  Grayson Morris

发明人： Edwin F. Barry ,  Gerald G. Pechanek ,  Thomas L. Drabenstott ,  Edward A. Wolff ,  Nikos P. Pitsianis ,  Grayson Morris

IPC分类号： G06F15/16 ,  G06F15/173 ,  G06F15/80 ,  H04L12/56

CPC分类号： G06F15/17381 ,  H04L49/1553 ,  H04L49/201 ,  H04L49/3009 ,  H04L49/45

摘要： Processing element to processing element switch connection control is described using a receive model that precludes communication hazards from occurring in a synchronous MIMD mode of operation. Such control allows different communication topologies and various processing effects such as an array transpose, hypercomplement or the like to be efficiently achieved utilizing architectures, such as the manifold array processing architecture. An encoded instruction method reduces the amount of state information and setup burden on the programmer taking advantage of the recognition that the majority of algorithms will use only a small fraction of all possible mux settings available. Thus, by means of transforming the PE identification based upon a communication path specified by a PE communication instruction an efficient switch control mechanism can be used. This control mechanism allows PE register broadcast operations as well as the standard mesh and hypercube communication paths over the same interconnection network. PE to PE communication instructions PEXCHG, SPRECV and SPSEND are also defined and implemented.

公开(公告)号：US06748517B1

公开(公告)日：2004-06-08

申请号：US09599980

申请日：2000-06-22

申请人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, Jr. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, Jr. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F944

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized testcases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

摘要翻译： 这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。 该方法的各个方面包括语法的规律性，可以以数据库形式表示指令集的相对容易程度，可以创建工具的准备就绪能力，自检代码的准备生成和参数化测试用例。 可以很容易地映射参数化，并显着简化系统维护。

公开(公告)号：US20120124335A1

公开(公告)日：2012-05-17

申请号：US13344339

申请日：2012-01-05

申请人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Franklin Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Franklin Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F9/312

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

摘要翻译： 这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。 该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。 可以很容易地映射参数化，并显着简化系统维护。

公开(公告)号：US07962667B2

公开(公告)日：2011-06-14

申请号：US11827548

申请日：2007-07-12

申请人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, Jr. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, Jr. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F13/28 ,  G06F13/00

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

摘要翻译： 这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。 该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。 可以很容易地映射参数化，并显着简化系统维护。

公开(公告)号：US20130007331A1

公开(公告)日：2013-01-03

申请号：US13611969

申请日：2012-09-12

申请人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F13/36

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

摘要翻译： 这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。 该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。 可以很容易地映射参数化，并显着简化系统维护。

公开(公告)号：US20110219210A1

公开(公告)日：2011-09-08

申请号：US13106042

申请日：2011-05-12

申请人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F9/312 ,  G06F9/30

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

摘要翻译： 这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。 该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。 可以很容易地映射参数化，并显着简化系统维护。

公开(公告)号：US20090063724A1

公开(公告)日：2009-03-05

申请号：US11827548

申请日：2007-07-12

申请人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald G. Pechanek ,  David Carl Strube ,  Edwin Frank Barry ,  Charles W. Kurak, JR. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F13/28

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： Details of a highly cost effective and efficient implementation of a manifold array (ManArray) architecture and instruction syntax for use therewith are described herein. Various aspects of this approach include the regularity of the syntax, the relative ease with which the instruction set can be represented in database form, the ready ability with which tools can be created, the ready generation of self-checking codes and parameterized test cases. Parameterizations can be fairly easily mapped and system maintenance is significantly simplified.

摘要翻译： 这里描述了使用歧管阵列（ManArray）架构和指令语法的高成本有效和高效的实现的细节。 该方法的各个方面包括语法的规律性，指示集可以以数据库形式表示的相对容易程度，可以创建工具的就绪能力，即时生成自检代码和参数化测试用例。 可以很容易地映射参数化，并显着简化系统维护。

公开(公告)号：US07266620B1

公开(公告)日：2007-09-04

申请号：US10797726

申请日：2004-03-10

申请人： Gerald George Pechanek ,  David Strube ,  Edwin Franklin Barry ,  Charles W. Kurak, Jr. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

发明人： Gerald George Pechanek ,  David Strube ,  Edwin Franklin Barry ,  Charles W. Kurak, Jr. ,  Carl Donald Busboom ,  Dale Edward Schneider ,  Nikos P. Pitsianis ,  Grayson Morris ,  Edward A. Wolff ,  Patrick R. Marchand ,  Ricardo E. Rodriguez ,  Marco C. Jacobs

IPC分类号： G06F13/28 ,  G06F13/00

CPC分类号： G06F15/82 ,  G06F9/30145 ,  G06F11/263 ,  Y10S707/99943

摘要： A system core having an internal memory which transfers data from an external device to the internal memory is described. To this end, the system core includes a processor, a direct memory access (DMA) controller, an instruction memory and a plurality of memories. The instruction memory contains processor instructions and DMA instructions. The DMA controller fetches DMA instructions from the instruction memory. The DMA controller executes the fetched DMA instructions and thus populates the plurality of memories with data from the external device. The processor then operates on the data found in the populated memories.

摘要翻译： 描述具有将数据从外部设备传送到内部存储器的内部存储器的系统核心。 为此，系统核心包括处理器，直接存储器访问（DMA）控制器，指令存储器和多个存储器。 指令存储器包含处理器指令和DMA指令。 DMA控制器从指令存储器中获取DMA指令。 DMA控制器执行所提取的DMA指令，并且由此来自外部设备的数据填充多个存储器。 然后，处理器对在填充的存储器中找到的数据进行操作。