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    Information processing apparatus and method of operating neural network computing device therein
    3.
    发明授权
    Information processing apparatus and method of operating neural network computing device therein 有权

    公开(公告)号：US11507799B2

    公开(公告)日：2022-11-22

    申请号：US16808124

    申请日：2020-03-03

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Mi Young Lee ,  Joo Hyun Lee

    IPC: G06N3/04 ,  G06F12/02 ,  G06N3/063 ,  G06N3/08

    Abstract: Provided is a method of operating a neural network computing device that is configured to communicate with an external memory device and execute a plurality of layers. The method includes computing a first input address, based on first layer information of a first layer among the plurality of layers and a first memory management table, and updating the first memory management table to generate a second memory management table, reading first input data to be input to the first layer from the external memory device, based on the computed first input address, computing a first output address, based on the first layer information and the second memory management table, and updating the second memory management table to generate a third memory management table, and storing first output data output from the first layer, based on the first output address, in the external memory device.

    Neuromorphic arithmetic device and operating method thereof
    4.
    发明授权
    Neuromorphic arithmetic device and operating method thereof 有权

    公开(公告)号：US11494630B2

    公开(公告)日：2022-11-08

    申请号：US16742808

    申请日：2020-01-14

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Young-deuk Jeon ,  Byung Jo Kim ,  Ju-Yeob Kim ,  Jin Kyu Kim ,  Ki Hyuk Park ,  Mi Young Lee ,  Joo Hyun Lee ,  Min-Hyung Cho

    IPC: G06N3/063 ,  G06F7/575 ,  G06F17/15

    Abstract: The neuromorphic arithmetic device comprises an input monitoring circuit that outputs a monitoring result by monitoring that first bits of at least one first digit of a plurality of feature data and a plurality of weight data are all zeros, a partial sum data generator that skips an arithmetic operation that generates a first partial sum data corresponding to the first bits of a plurality of partial sum data in response to the monitoring result while performing the arithmetic operation of generating the plurality of partial sum data, based on the plurality of feature data and the plurality of weight data, and a shift adder that generates the first partial sum data with a zero value and result data, based on second partial sum data except for the first partial sum data among the plurality of partial sum data and the first partial sum data generated with the zero value.

    SYSTEM AND METHOD FOR EFFICIENT ADDRESS TRANSLATION OF FLASH MEMORY DEVICE
    6.
    发明申请
    SYSTEM AND METHOD FOR EFFICIENT ADDRESS TRANSLATION OF FLASH MEMORY DEVICE 有权
    用于闪存存储器件的高效地址转换的系统和方法

    公开(公告)号：US20150193339A1

    公开(公告)日：2015-07-09

    申请号：US14204597

    申请日：2014-03-11

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Chang Soo Kim ,  Hun Soon Lee ,  Kyoung Hyun Park ,  Mai Hai Thanh ,  Mi Young Lee ,  Sung Jin Hur

    IPC: G06F12/02 ,  G06F12/10

    CPC classification number: G06F12/0246 ,  G06F12/10 ,  G06F2212/7201

    Abstract: Disclosed are a system and a method for address translation for a flash memory device, and particularly, disclosed is a technology that is capable of efficiently performing address translation between a logical address provided to the outside of a flash memory and a physical address of an actual flash memory in managing the flash memory device. The system includes: a flash memory system writing a corresponding data page by allocating a physical address space when there is a request for writing a data page from storage clients, and performing address translation between a physical address and a logical address; and a logical address space formed between the flash memory system and the storage client to provide the logical address.

    Abstract translation: 公开了一种用于闪速存储器件的地址转换的系统和方法，特别是公开了一种能够在提供给闪存的外部的逻辑地址和实际的闪存的物理地址之间有效地执行地址转换的技术 Flash存储器管理闪存设备。 该系统包括：闪存系统，当存在来自存储客户机的写入数据页的请求时，通过分配物理地址空间，并在物理地址和逻辑地址之间执行地址转换来写入对应的数据页; 以及在闪存系统和存储客户端之间形成的逻辑地址空间以提供逻辑地址。

    METHOD AND SYSTEM OF PROVIDING SERVICE USING USER DESCRIPTION, SERVICE DESCRIPTION AND CONTENTS DESCRIPTION
    9.
    发明申请
    METHOD AND SYSTEM OF PROVIDING SERVICE USING USER DESCRIPTION, SERVICE DESCRIPTION AND CONTENTS DESCRIPTION 审中-公开
    使用用户描述提供服务的方法和系统，服务描述和内容描述

    公开(公告)号：US20140019282A1

    公开(公告)日：2014-01-16

    申请号：US13939839

    申请日：2013-07-11

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Sang Hyun JOO ,  Il Kwon Jeong ,  Bon Ki Koo ,  Jin Seok Kim ,  Hyoung Joong Kim ,  Mi Young Lee ,  Sung Wook Balk

    IPC: G06Q30/06

    CPC classification number: G06Q30/0601

    Abstract: A method of providing a service using a user description, a service description, and a contents description may include: receiving first user information from a first user description including first user information; receiving environment information from the contents description including environment information; selecting optimal service information from the service description including service information based on at least one of the first user information and the environment information; and providing a service corresponding to the selected optimal service information to a first user.

    Abstract translation: 使用用户描述，服务描述和内容描述提供服务的方法可以包括：从包括第一用户信息的第一用户描述接收第一用户信息; 从包括环境信息的内容描述中接收环境信息; 基于第一用户信息和环境信息中的至少一个，从包括服务信息的服务描述中选择最优服务信息; 以及向所述第一用户提供与所选择的最佳服务信息相对应的服务。

    Quantization method and device for weights of batch normalization layer
    10.
    发明授权
    Quantization method and device for weights of batch normalization layer 有权

    公开(公告)号：US11455539B2

    公开(公告)日：2022-09-27

    申请号：US16541275

    申请日：2019-08-15

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Mi Young Lee ,  Byung Jo Kim ,  Seong Min Kim ,  Ju-Yeob Kim ,  Jin Kyu Kim ,  Joo Hyun Lee

    IPC: G06N3/08 ,  G06F17/18

    Abstract: An embodiment of the present invention provides a quantization method for weights of a plurality of batch normalization layers, including: receiving a plurality of previously learned first weights of the plurality of batch normalization layers; obtaining first distribution information of the plurality of first weights; performing a first quantization on the plurality of first weights using the first distribution information to obtain a plurality of second weights; obtaining second distribution information of the plurality of second weights; and performing a second quantization on the plurality of second weights using the second distribution information to obtain a plurality of final weights, and thereby reducing an error that may occur when quantizing the weight of the batch normalization layer.

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