SYSTEM AND METHOD TO PROTECT COMPUTING SYSTEMS
    1.
    发明申请
    SYSTEM AND METHOD TO PROTECT COMPUTING SYSTEMS 有权
    保护计算机系统和方法

    公开(公告)号:US20080320313A1

    公开(公告)日:2008-12-25

    申请号:US11767545

    申请日:2007-06-25

    IPC分类号: G06F12/14

    CPC分类号: G06F21/567

    摘要: A system and method for protecting computing systems, and more particularly a system and method which a dedicated hardware component configured to communicate with a protection program. A computer hardware subsystem includes a memory comprising content. The content is at least a list of files which have been modified within a predetermined period of time. The list of files is a subset of files of a hard drive. A dedicated hardware component is configured to track the files which have been modified and provide a location of the files to the memory. A communication link between the dedicated hardware component and a protection program provides the protection program with the subset of files of the hard drive as referenced by the memory content.

    摘要翻译: 一种用于保护计算系统的系统和方法,更具体地,涉及配置成与保护程序进行通信的专用硬件组件的系统和方法。 计算机硬件子系统包括包含内容的存储器。 内容至少是在预定时间段内被修改的文件的列表。 文件列表是硬盘驱动器文件的一部分。 专用硬件组件被配置为跟踪已被修改的文件并且将文件的位置提供给存储器。 专用硬件组件和保护程序之间的通信链路为保护程序提供硬盘驱动器的文件的子集,如存储器内容所引用的。

    System and method to protect computing systems
    2.
    发明授权
    System and method to protect computing systems 有权
    保护计算机系统和方法

    公开(公告)号:US08341428B2

    公开(公告)日:2012-12-25

    申请号:US11767545

    申请日:2007-06-25

    IPC分类号: G06F21/00

    CPC分类号: G06F21/567

    摘要: A system and method for protecting computing systems, and more particularly a system and method which a dedicated hardware component configured to communicate with a protection program. A computer hardware subsystem includes a memory comprising content. The content is at least a list of files which have been modified within a predetermined period of time. The list of files is a subset of files of a hard drive. A dedicated hardware component is configured to track the files which have been modified and provide a location of the files to the memory. A communication link between the dedicated hardware component and a protection program provides the protection program with the subset of files of the hard drive as referenced by the memory content.

    摘要翻译: 一种用于保护计算系统的系统和方法,更具体地,涉及配置成与保护程序进行通信的专用硬件组件的系统和方法。 计算机硬件子系统包括包含内容的存储器。 内容至少是在预定时间段内被修改的文件的列表。 文件列表是硬盘驱动器文件的一部分。 专用硬件组件被配置为跟踪已被修改的文件并且将文件的位置提供给存储器。 专用硬件组件和保护程序之间的通信链路为保护程序提供硬盘驱动器的文件的子集,如存储器内容所引用的。

    SYSTEM AND METHOD TO PROTECT COMPUTING SYSTEMS
    3.
    发明申请
    SYSTEM AND METHOD TO PROTECT COMPUTING SYSTEMS 审中-公开
    保护计算机系统和方法

    公开(公告)号:US20080320423A1

    公开(公告)日:2008-12-25

    申请号:US11873754

    申请日:2007-10-17

    IPC分类号: G06F17/50

    CPC分类号: G06F21/567

    摘要: A system and method for protecting computing systems, and more particularly a system and method which a dedicated hardware component configured to communicate with a protection program. A computer hardware subsystem includes a memory comprising content. The content is at least a list of files which have been modified within a predetermined period of time. The list of files is a subset of files of a hard drive. A dedicated hardware component is configured to track the files which have been modified and provide a location of the files to the memory. A communication link between the dedicated hardware component and a protection program provides the protection program with the subset of files of the hard drive as referenced by the memory content. The invention is also directed to a design structure on which a circuit resides.

    摘要翻译: 一种用于保护计算系统的系统和方法,更具体地,涉及配置成与保护程序进行通信的专用硬件组件的系统和方法。 计算机硬件子系统包括包含内容的存储器。 内容至少是在预定时间段内被修改的文件的列表。 文件列表是硬盘驱动器文件的一部分。 专用硬件组件被配置为跟踪已被修改的文件并且将文件的位置提供给存储器。 专用硬件组件和保护程序之间的通信链路为保护程序提供硬盘驱动器的文件的子集,如存储器内容所引用的。 本发明还涉及电路所在的设计结构。

    Method and apparatus for secure and reliable computing

    公开(公告)号:US08424071B2

    公开(公告)日:2013-04-16

    申请号:US12621570

    申请日:2009-11-19

    IPC分类号: G06F7/04

    CPC分类号: G06F21/55 G06F21/31

    摘要: In one embodiment, the invention is a method and apparatus for secure and reliable computing. One embodiment of an end-to-end security system for protecting a computing system includes a processor interface coupled to at least one of an application processor and an accelerator of the computing system, for receiving requests from the at least one of the application processor and the accelerator, a security processor integrating at least one embedded storage unit and connected to the processor interface with a tightly coupled memory unit for performing at least one of: authenticating, managing, monitoring, and processing the requests, and a data interface for communicating with a display, a network, and at least one embedded storage unit for securely holding at least one of data and programs used by the at least one of the application processor and the accelerator.

    Method and Apparatus for Secure and Reliable Computing
    5.
    发明申请
    Method and Apparatus for Secure and Reliable Computing 有权
    用于安全可靠计算的方法和装置

    公开(公告)号:US20100269166A1

    公开(公告)日:2010-10-21

    申请号:US12621570

    申请日:2009-11-19

    IPC分类号: G06F21/20

    CPC分类号: G06F21/55 G06F21/31

    摘要: In one embodiment, the invention is a method and apparatus for secure and reliable computing. One embodiment of an end-to-end security system for protecting a computing system includes a processor interface coupled to at least one of an application processor and an accelerator of the computing system, for receiving requests from the at least one of the application processor and the accelerator, a security processor integrating at least one embedded storage unit and connected to the processor interface with a tightly coupled memory unit for performing at least one of: authenticating, managing, monitoring, and processing the requests, and a data interface for communicating with a display, a network, and at least one embedded storage unit for securely holding at least one of data and programs used by the at least one of the application processor and the accelerator.

    摘要翻译: 在一个实施例中,本发明是用于安全和可靠计算的方法和装置。 用于保护计算系统的端到端安全系统的一个实施例包括耦合到计算系统的应用处理器和加速器中的至少一个的处理器接口,用于接收来自应用处理器的至少一个和 加速器,集成至少一个嵌入式存储单元并且与处理器接口连接的紧密耦合的存储器单元的安全处理器,用于执行以下至少一个:认证,管理,监视和处理请求,以及数据接口,用于与 显示器,网络和至少一个嵌入式存储单元,用于安全地保持应用处理器和加速器中的至少一个使用的数据和程序中的至少一个。

    DESIGN OF BEOL PATTERNS TO REDUCE THE STRESSES ON STRUCTURES BELOW CHIP BONDPADS
    6.
    发明申请
    DESIGN OF BEOL PATTERNS TO REDUCE THE STRESSES ON STRUCTURES BELOW CHIP BONDPADS 失效
    BEOL模式的设计,以减少下面的结构的压力

    公开(公告)号:US20060012045A1

    公开(公告)日:2006-01-19

    申请号:US10710510

    申请日:2004-07-16

    IPC分类号: H01L23/52

    摘要: A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.

    摘要翻译: 一种半导体结构,包括:基板,包括第一层,所述第一层包括具有第一弹性模量的第一材料; 包括导体并形成在所述基板内的第一结构,所述第一结构具有上表面; 以及靠近所述第一结构并且在所述第一层内的应力转向结构,所述应力转向结构在向所述第一结构施加物理载荷时在所述第一结构的上表面处提供低机械应力区域,其中所述低机械应力区域 包括低于应力转移结构保护区域的应力值。 应力转向结构包括具有小于第一弹性模量的第二弹性模量的第二材料,第二材料选择性地形成在第一结构的上表面上,用于转移由施加到第一结构的物理负载产生的机械应力。

    Design structure for compensating for variances of a buried resistor in an integrated circuit
    7.
    发明授权
    Design structure for compensating for variances of a buried resistor in an integrated circuit 有权
    用于补偿集成电路中埋地电阻的方差的设计结构

    公开(公告)号:US07962322B2

    公开(公告)日:2011-06-14

    申请号:US12135232

    申请日:2008-06-09

    IPC分类号: G06F17/50 H01L35/00

    CPC分类号: G05F1/561 G11C7/04

    摘要: A design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a circuit that compensates for variances in the resistance of the buried resistor during operation of the integrated circuit using a waveform that is representative of the thermal characteristics of the buried resistor.

    摘要翻译: 一种包括元件的设计结构,当在计算机辅助设计系统中进行处理时,可以生成电路的机器可执行表示,该电路可以使用代表热量的波形来补偿集成电路运行期间埋入电阻的电阻方差 埋电阻的特性。

    Design Structure for Compensating for Variances of a Buried Resistor in an Integrated Circuit
    8.
    发明申请
    Design Structure for Compensating for Variances of a Buried Resistor in an Integrated Circuit 有权
    用于补偿集成电路中埋地电阻器的差异的设计结构

    公开(公告)号:US20080234997A1

    公开(公告)日:2008-09-25

    申请号:US12135232

    申请日:2008-06-09

    IPC分类号: G06F17/50 G11C11/00

    CPC分类号: G05F1/561 G11C7/04

    摘要: A design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a circuit that compensates for variances in the resistance of the buried resistor during operation of the integrated circuit using a waveform that is representative of the thermal characteristics of the buried resistor.

    摘要翻译: 一种包括元件的设计结构,当在计算机辅助设计系统中进行处理时,可以生成电路的机器可执行表示,该电路可以使用代表热量的波形来补偿集成电路运行期间埋入电阻的电阻方差 埋电阻的特性。

    Method of generating a functional design structure
    10.
    发明授权
    Method of generating a functional design structure 有权
    生成功能设计结构的方法

    公开(公告)号:US07886237B2

    公开(公告)日:2011-02-08

    申请号:US12135231

    申请日:2008-06-09

    IPC分类号: G06F17/50

    CPC分类号: G05F1/561 G11C7/04

    摘要: A method in a computer-aided design system for generating a functional design model of a circuit that compensates for changes in resistance of a buried resistor by using a waveform that is representative of the thermal characteristics of the buried resistor.

    摘要翻译: 一种计算机辅助设计系统中的一种方法,用于通过使用代表埋电阻器的热特性的波形来产生补偿埋电阻器的电阻变化的电路的功能设计模型。