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公开(公告)号:US20240322798A1
公开(公告)日:2024-09-26
申请号:US18125331
申请日:2023-03-23
Inventor: Chih-Sheng CHANG , Isaac Y. CHEN
CPC classification number: H03K3/017 , H03K3/037 , H03K19/20 , H04R3/00 , H04R29/001
Abstract: An electronic device includes a sampling circuit and a summing circuit coupled with the sampling circuit. The sampling circuit samples a pulse width of a first input pulse of a PWM input signal since a first time point on a rising edge of a clock pulse of a clock signal. The summing circuit generates a first output pulse of a PWM output signal since a second time point on a falling edge of the clock pulse. A pulse width of the first output pulse is a summation of the pulse width of the first input pulse and a pulse width of a second input pulse of the PWM input signal, and the second input pulse is the next pulse after the first input pulse.