Single step CMP for polishing three or more layer film stacks
    1.
    发明授权
    Single step CMP for polishing three or more layer film stacks 有权
    用于抛光三层或更多层薄膜叠层的单步CMP

    公开(公告)号:US08334190B2

    公开(公告)日:2012-12-18

    申请号:US12776057

    申请日:2010-05-07

    IPC分类号: H01L21/763 H01L21/302

    摘要: A one-step CMP process for polishing three or more layer film stacks on a wafer having a multilayer film stack thereon including a silicon nitride (SiNx) layer on its semiconductor surface, and a silicon oxide layer on the SiNx layer, wherein trench access vias extend through the silicon oxide layer and SiNx layer to trenches formed into the semiconductor surface, and wherein a polysilicon layer fills the trench access vias, fills the trenches, and is on the silicon oxide layer. CMP polishes the multilayer film stack with a slurry including slurry particles including at least one of silica and ceria. The CMP provides a removal rate (RR) for the polysilicon layer > a RR for the silicon oxide layer > a RR for the SiNx layer. The CMP process is continued to remove the polysilicon layer, silicon oxide layer and a portion of the SiNx layer to stop on the SiNx layer. Optical endpointing during CMP can provide a predetermined remaining thickness range for the SiNx layer.

    摘要翻译: 一种用于在其上具有多层膜堆叠的晶片上的三层或更多层膜堆叠的半导体表面上的氮化硅(SiNx)层和SiN x层上的氧化硅层的一步CMP工艺,其中沟槽通孔 延伸穿过硅氧化物层和SiNx层到形成半导体表面的沟槽,并且其中多晶硅层填充沟槽接通通孔,填充沟槽并且在氧化硅层上。 CMP用包括二氧化硅和二氧化铈中的至少一种的浆料颗粒的浆料抛光多层膜堆叠。 CMP提供多晶硅层的去除率(RR)>硅氧化物层的RR> SiNx层的RR。 继续进行CMP处理以去除SiN x层上的多晶硅层,氧化硅层和SiNx层的一部分。 CMP期间的光学终点可以为SiNx层提供预定的剩余厚度范围。

    SINGLE STEP CMP FOR POLISHING THREE OR MORE LAYER FILM STACKS
    2.
    发明申请
    SINGLE STEP CMP FOR POLISHING THREE OR MORE LAYER FILM STACKS 有权
    用于抛光三层或更多层膜片的单步CMP

    公开(公告)号:US20110275168A1

    公开(公告)日:2011-11-10

    申请号:US12776057

    申请日:2010-05-07

    IPC分类号: H01L21/66 H01L21/306

    摘要: A one-step CMP process for polishing three or more layer film stacks on a wafer having a multilayer film stack thereon including a silicon nitride (SiNx) layer on its semiconductor surface, and a silicon oxide layer on the SiNx layer, wherein trench access vias extend through the silicon oxide layer and SiNx layer to trenches formed into the semiconductor surface, and wherein a polysilicon layer fills the trench access vias, fills the trenches, and is on the silicon oxide layer. CMP polishes the multilayer film stack with a slurry including slurry particles including at least one of silica and ceria. The CMP provides a removal rate (RR) for the polysilicon layer>a RR for the silicon oxide layer>a RR for the SiNx layer. The CMP process is continued to remove the polysilicon layer, silicon oxide layer and a portion of the SiNx layer to stop on the SiNx layer. Optical endpointing during CMP can provide a predetermined remaining thickness range for the SiNx layer.

    摘要翻译: 一种用于在其上具有多层膜堆叠的晶片上的三层或更多层膜堆叠的半导体表面上的氮化硅(SiNx)层和SiN x层上的氧化硅层的一步CMP工艺,其中沟槽通孔 延伸穿过硅氧化物层和SiNx层到形成半导体表面的沟槽,并且其中多晶硅层填充沟槽接通通孔,填充沟槽并且在氧化硅层上。 CMP用包括二氧化硅和二氧化铈中的至少一种的浆料颗粒的浆料抛光多层膜堆叠。 CMP提供多晶硅层的去除率(RR)>硅氧化物层的RR> SiNx层的RR。 继续进行CMP处理以去除SiN x层上的多晶硅层,氧化硅层和SiNx层的一部分。 CMP期间的光学终点可以为SiNx层提供预定的剩余厚度范围。