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1.发明授权公开(公告)号：US11611193B2
公开(公告)日：2023-03-21
申请号：US16666714
申请日：2019-10-29
Applicant: Excelitas Canada, Inc.
Inventor： Gabriel Charlebois , JinHan Ju , Lawrence Godfrey
IPC: H01S5/042 , H05K1/18 , H05K3/30 , H01L23/48 , H01L23/495 , H03K17/687 , H05K1/11 , H05K1/16 , H05K7/20 , H01S5/0231 , H01S5/02234 , H01S5/02325 , H01S5/02345 , H01S5/40
Abstract: A surface mountable laser driver circuit package is configured to mount on a host printed circuit board (PCB). A surface mount circuit package includes a lead-frame. A plurality of laser driver circuit components is mounted on and in electrical communication with the lead-frame of the surface mount circuit package. A dielectric layer is located between the lead-frame and the host PCB and includes portals through the dielectric layer each arranged to accommodate an electrical connection between the lead-frame and the host PCB. The lead-frame and the dielectric layer are arranged such that a first lead-frame portion and a first dielectric layer portal align with a first end of a host PCB trace configured to provide a current return path for the surface mount laser driver, and a second lead-frame portion and a second dielectric layer portal align with a second end of the host PCB trace.
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Patent Agency Ranking
公开(公告)号：US20160305750A1
公开(公告)日：2016-10-20
申请号：US15098884
申请日：2016-04-14
Applicant: Excelitas Canada, Inc.
Inventor： Lawrence Godfrey
Abstract: A chip slapper is presented, having a substrate, a conductive layer disposed above the substrate face, and an intermediate layer disposed between the substrate face and the conductive layer. The conductive layer and intermediate layer form a first land and a second land atop the substrate face, with a bridge formed of the intermediate layer spanning between the first land and the second land. A first adhesion portion is attached to the first land, and a second adhesion portion is attached to the second land, wherein at least a portion of the bridge is not overlaid by the first adhesion portion or the second adhesion portion.
Abstract translation: 提供了一种芯片贴片器，其具有衬底，设置在衬底表面上方的导电层以及设置在衬底表面和导电层之间的中间层。 导电层和中间层在衬底表面上形成第一焊盘和第二焊盘，由跨越第一焊盘和第二焊盘之间的中间层形成的桥。 第一粘合部分附接到第一焊盘，第二粘合部分附接到第二焊盘，其中桥的至少一部分不被第一粘合部分或第二粘合部分覆盖。
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公开(公告)号：US09273995B2
公开(公告)日：2016-03-01
申请号：US14172275
申请日：2014-02-04
Applicant: Excelitas Canada, Inc.
Inventor： Lawrence Godfrey , Arthur Barlow
CPC classification number: G01J1/42 , G01J1/30 , G01J2001/4247 , H01L25/167 , H01L2224/48091 , H01L2224/48247 , H01L2933/0033 , H01L2924/00014
Abstract: A method of reducing variation in optical power levels across a group of light emitting diodes includes testing each respective one of the light emitting diodes to determine an optical power level produced by that light emitting diode when connected to an electrical power source. During testing, the electrical power source delivers a substantially identical amount of electrical current to each respective one of the light emitting diodes. The optical power levels from the test all fall within a first range of values. The method includes connecting an electrical resistance in parallel with at least some of the light emitting diodes to reduce an amount of optical power produced by those light emitting diodes. After the electrical resistances are connected, all of the optical power levels produced by the light emitting diodes fall within a second range that is narrower than the first range.
Abstract translation: 一种减少一组发光二极管的光功率电平变化的方法包括测试每个发光二极管中的每一个以确定连接到电源时由该发光二极管产生的光功率电平。 在测试期间，电源向每个相应的一个发光二极管传送大致相同的电流量。 来自测试的光功率水平都落在第一范围内。 该方法包括将电阻与至少一些发光二极管并联连接以减少由这些发光二极管产生的光功率的量。 在连接电阻之后，由发光二极管产生的所有光功率水平落在窄于第一范围的第二范围内。
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公开(公告)号：US11264778B2
公开(公告)日：2022-03-01
申请号：US16666792
申请日：2019-10-29
Applicant: Excelitas Canada, Inc.
Inventor： Lawrence Godfrey
IPC: H01S5/02355 , H01S5/02234
Abstract: A semiconductor package is manufactured by physically attaching a side emitting laser diode to a floor portion of a recessed flat no-leads (FNL) package having a wall extending from and surrounding a perimeter of a recessed floor portion. The attached side emitting laser diode is oriented to direct a laser beam toward an opposing portion of the wall. The FNL package is singulated into a first piece and a second piece along a singulation plane through the FNL package wall and floor portion between the side emitting laser diode and the opposing portion of the wall. After singulation the opposing portion of the wall is in the second piece and the side emitting laser diode is in the first piece.
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公开(公告)号：US09791248B2
公开(公告)日：2017-10-17
申请号：US15098884
申请日：2016-04-14
Applicant: Excelitas Canada, Inc.
Inventor： Lawrence Godfrey
Abstract: A chip slapper is presented, having a substrate, a conductive layer disposed above the substrate face, and an intermediate layer disposed between the substrate face and the conductive layer. The conductive layer and intermediate layer form a first land and a second land atop the substrate face, with a bridge formed of the intermediate layer spanning between the first land and the second land. A first adhesion portion is attached to the first land, and a second adhesion portion is attached to the second land, wherein at least a portion of the bridge is not overlaid by the first adhesion portion or the second adhesion portion.
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公开(公告)号：US20150219490A1
公开(公告)日：2015-08-06
申请号：US14172275
申请日：2014-02-04
Applicant: Excelitas Canada, Inc.
Inventor： Lawrence Godfrey , Arthur Barlow
IPC: G01J1/42
CPC classification number: G01J1/42 , G01J1/30 , G01J2001/4247 , H01L25/167 , H01L2224/48091 , H01L2224/48247 , H01L2933/0033 , H01L2924/00014
Abstract: A method of reducing variation in optical power levels across a group of light emitting diodes includes testing each respective one of the light emitting diodes to determine an optical power level produced by that light emitting diode when connected to an electrical power source. During testing, the electrical power source delivers a substantially identical amount of electrical current to each respective one of the light emitting diodes. The optical power levels from the test all fall within a first range of values. The method includes connecting an electrical resistance in parallel with at least some of the light emitting diodes to reduce an amount of optical power produced by those light emitting diodes. After the electrical resistances are connected, all of the optical power levels produced by the light emitting diodes fall within a second range that is narrower than the first range.
Abstract translation: 一种减少一组发光二极管的光功率电平变化的方法包括测试每个相应的发光二极管，以确定当连接到电源时由该发光二极管产生的光功率电平。 在测试期间，电源向每个相应的一个发光二极管传送大致相同的电流量。 来自测试的光功率水平都落在第一范围内。 该方法包括将电阻与至少一些发光二极管并联连接以减少由这些发光二极管产生的光功率的量。 在连接电阻之后，由发光二极管产生的所有光功率水平落在窄于第一范围的第二范围内。
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