公开(公告)号：US09940267B2

公开(公告)日：2018-04-10

申请号：US15267835

申请日：2016-09-16

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Ciprian Arbone ,  Bogdan Florin Ditu

IPC: G06F12/00 ,  G06F12/14 ,  G06F12/06

CPC classification number: G06F12/1441 ,  G06F8/41 ,  G06F8/4441 ,  G06F12/0692 ,  G06F2212/1041 ,  G06F2212/1052

Abstract: A processing device includes a target processor instruction memory to store a plurality of target processor instructions that include a plurality of global memory access instructions. The processing device further includes a compiler to communicate with the target processor instruction memory, the compiler including: a global variable candidate detection module to identify a global memory access instruction within a set of code regions that use a set of global variable candidates to access a global memory, and a memory access optimization module to modify the global memory access instruction, wherein the modified global memory access instruction utilizes an unused base pointer register of a set of unused base pointer register candidates within the set of code regions, a global variable from the set of global variable candidates to be used as a base address, and an offset relative to the base address to access the global memory.

公开(公告)号：US20170337142A1

公开(公告)日：2017-11-23

申请号：US15267835

申请日：2016-09-16

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Ciprian Arbone ,  Bogdan Florin Ditu

IPC: G06F12/14 ,  G06F12/06

CPC classification number: G06F12/1441 ,  G06F8/41 ,  G06F8/4441 ,  G06F12/0692 ,  G06F2212/1041 ,  G06F2212/1052

Abstract: A processing device includes a target processor instruction memory to store a plurality of target processor instructions that include a plurality of global memory access instructions. The processing device further includes a compiler to communicate with the target processor instruction memory, the compiler including: a global variable candidate detection module to identify a global memory access instruction within a set of code regions that use a set of global variable candidates to access a global memory, and a memory access optimization module to modify the global memory access instruction, wherein the modified global memory access instruction utilizes an unused base pointer register of a set of unused base pointer register candidates within the set of code regions, a global variable from the set of global variable candidates to be used as a base address, and an offset relative to the base address to access the global memory.