公开(公告)号：US09461869B2

公开(公告)日：2016-10-04

申请号：US14149215

申请日：2014-01-07

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Roy Shor ,  Ori Goren ,  Avraham Horn

IPC: G06F13/28 ,  H04L29/08 ,  H04L27/34 ,  H04L25/02 ,  H04L27/32 ,  H04L25/05 ,  H04L27/12 ,  H04W88/08 ,  H04W24/02 ,  H04W28/06 ,  H04B1/00

CPC classification number: H04L29/08027 ,  G06F13/28 ,  H04L25/05 ,  H04L27/34

Abstract: A digital signal processor (300), compatible with the Common Public Radio Interface (CPRI), permits reading and writing of IQ data of antenna carriers which have two different sampling rates by using just two single sample rate DMA (Direct Memory Access) modules (306,313). The digital signal processor (300) is capable of processing data of different sampling rates on just one CPRI lane comprising one framer (302). This is achieved by incorporating a divider module (307) and a multiplexer module (314) between the framer (302) and system memory (309, 315). The processor (300) may also be configured so that single sampling rates can also be accommodated.

Abstract translation: 与普通公共无线电接口（CPRI）兼容的数字信号处理器（300）允许通过仅使用两个单采样率DMA（直接存储器访问）模块来读取和写入具有两个不同采样率的天线载波的IQ数据 306,313）。 数字信号处理器（300）能够在仅包括一个成帧器（302）的一个CPRI线路上处理不同采样率的数据。 这通过在成帧器（302）和系统存储器（309,315）之间并入分频器模块（307）和多路复用器模块（314）来实现。 处理器（300）也可以被配置为使得也可以容纳单个采样率。

公开(公告)号：US20140094157A1

公开(公告)日：2014-04-03

申请号：US13632549

申请日：2012-10-01

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Tuongvu V. Nguyen ,  John J. Vaglica ,  Roy Shor ,  Somvir Dahiya ,  Ori Goren ,  Avraham Horn ,  Arvind Kaushik ,  Arindam Sinha ,  Puneet Wadhawan

IPC: H04W88/08

CPC classification number: H04W88/085

Abstract: A method and apparatus automatically controls the insertion of information flow data over a shared CPRI link (561) by providing a hardware control mechanism (504-509) at a local radio base station subsystem (501) connected in a CPRI daisy chain configuration between a downstream RE device (570) and an upstream REC device (560) for determining whether the control word being transmitted is sourced from a downstream device (e.g., forwarded data from a downstream RE device) or from the local device.

Abstract translation: 一种方法和装置通过在以CPRI菊花链配置连接的本地无线电基站子系统（501）处提供硬件控制机制（504-509）来自动控制通过共享CPRI链路（561）插入信息流数据， 下游RE设备（570）和上游REC设备（560），用于确定正在发送的控制字是源自下游设备（例如，来自下游RE设备的转发数据）还是来自本地设备。

公开(公告)号：US09392640B2

公开(公告)日：2016-07-12

申请号：US13632549

申请日：2012-10-01

Applicant: Freescale Semiconductor, Inc.

Inventor： Tuongvu V. Nguyen ,  John J. Vaglica ,  Roy Shor ,  Somvir Dahiya ,  Ori Goren ,  Avraham Horn ,  Arvind Kaushik ,  Arindam Sinha ,  Puneet Wadhawan

IPC: H04M1/00 ,  H04W88/08

CPC classification number: H04W88/085

Abstract: A method and apparatus automatically controls the insertion of information flow data over a shared CPRI link (561) by providing a hardware control mechanism (504-509) at a local radio base station subsystem (501) connected in a CPRI daisy chain configuration between a downstream RE device (570) and an upstream REC device (560) for determining whether the control word being transmitted is sourced from a downstream device (e.g., forwarded data from a downstream RE device) or from the local device.

Abstract translation: 一种方法和装置通过在以CPRI菊花链配置连接的本地无线电基站子系统（501）处提供硬件控制机制（504-509）来自动控制通过共享CPRI链路（561）插入信息流数据， 下游RE设备（570）和上游REC设备（560），用于确定正在发送的控制字是源自下游设备（例如，来自下游RE设备的转发数据）还是来自本地设备。

公开(公告)号：US09112544B2

公开(公告)日：2015-08-18

申请号：US14091430

申请日：2013-11-27

Applicant: FREESCALE SEMICONDUCTOR, INC.

Inventor： Roy Shor ,  Odi Dahan ,  Ori Goren ,  Avraham Horn

IPC: H04B1/00 ,  H04L27/26

CPC classification number: H04B1/0057 ,  H04L27/2627 ,  H04L27/2628 ,  H04L27/2634 ,  H04L27/2649

Abstract: The method and system supports multiple bandwidth traffic over a single CPRI (common public radio interface) link (109) using a single bandwidth DMA (direct memory access) engine (505) and fast Fourier transform/inverse fast Fourier transform processing. (402, 404) The invention exploits fast Fourier transform/inverse fast Fourier transform properties and is particularly suitable for supporting LTE (Long Term Evolution) cellular communication systems (100) The CPRI Media Access Control is configured in each CPRI lane to run at the maximum bandwidth among the bandwidths required. In the uplink, lower bandwidth data samples are padded with zeros and flexible positioning may be used to arrange the data in a CPRI frame. In the downlink, the radio equipment receiver (106) only processes the relevant data and ignores any interpolated samples. The invention is compatible with CPRI and LTE standards.

Abstract translation: 该方法和系统使用单个带宽DMA（直接存储器访问）引擎（505）和快速傅里叶变换/快速傅里叶逆变换处理，在单个CPRI（公共无线电接口）链路（109）上支持多个带宽流量。 （402,404）本发明利用快速傅里叶变换/快速傅里叶逆变换特性，特别适用于支持LTE（长期演进）蜂窝通信系统（100）CPRI媒体访问控制被配置在每个CPRI通道中以在 所需带宽之间的最大带宽。 在上行链路中，较低带宽数据样本用零填充，并且可以使用灵活的定位来将数据排列在CPRI帧中。 在下行链路中，无线电设备接收机（106）仅处理相关数据并忽略任何内插采样。 本发明与CPRI和LTE标准兼容。